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Commit 210edfe

Browse files
Added new Unexpected Maker SQUiXL and EDGES3[D] boards. (#11350)
* Added new Unexpected Maker SQUiXL and EDGES3[D] boards. Signed-off-by: Seon Rozenblum <seonr@3sprockets.com> * Seems we are being picky about board names now ;) Signed-off-by: Seon Rozenblum <seonr@3sprockets.com> * Seems I have to have SPI pins defined for SQUiXL, or compiling breaks Signed-off-by: Seon Rozenblum <seon@unexpectedmaker.com> --------- Signed-off-by: Seon Rozenblum <seonr@3sprockets.com> Signed-off-by: Seon Rozenblum <seon@unexpectedmaker.com>
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‎boards.txt

Lines changed: 306 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3643,6 +3643,155 @@ um_bling.menu.EraseFlash.all.upload.erase_cmd=-e
36433643

36443644
##############################################################
36453645

3646+
um_edges3_d.name=UM EdgeS3[D]
3647+
um_edges3_d.vid.0=0x303a
3648+
um_edges3_d.pid.0=0x82DC
3649+
um_edges3_d.upload_port.0.vid=0x303a
3650+
um_edges3_d.upload_port.0.pid=0x82DC
3651+
3652+
um_edges3_d.bootloader.tool=esptool_py
3653+
um_edges3_d.bootloader.tool.default=esptool_py
3654+
3655+
um_edges3_d.upload.tool=esptool_py
3656+
um_edges3_d.upload.tool.default=esptool_py
3657+
um_edges3_d.upload.tool.network=esp_ota
3658+
3659+
um_edges3_d.upload.maximum_size=1310720
3660+
um_edges3_d.upload.maximum_data_size=327680
3661+
um_edges3_d.upload.flags=
3662+
um_edges3_d.upload.extra_flags=
3663+
um_edges3_d.upload.use_1200bps_touch=false
3664+
um_edges3_d.upload.wait_for_upload_port=false
3665+
3666+
um_edges3_d.serial.disableDTR=false
3667+
um_edges3_d.serial.disableRTS=false
3668+
3669+
um_edges3_d.build.tarch=xtensa
3670+
um_edges3_d.build.bootloader_addr=0x0
3671+
um_edges3_d.build.target=esp32s3
3672+
um_edges3_d.build.mcu=esp32s3
3673+
um_edges3_d.build.core=esp32
3674+
um_edges3_d.build.variant=um_edges3_d
3675+
um_edges3_d.build.board=EDGES3D
3676+
3677+
um_edges3_d.build.usb_mode=1
3678+
um_edges3_d.build.cdc_on_boot=1
3679+
um_edges3_d.build.msc_on_boot=0
3680+
um_edges3_d.build.dfu_on_boot=0
3681+
um_edges3_d.build.f_cpu=240000000L
3682+
um_edges3_d.build.flash_size=8MB
3683+
um_edges3_d.build.flash_freq=80m
3684+
um_edges3_d.build.flash_mode=dio
3685+
um_edges3_d.build.boot=qio
3686+
um_edges3_d.build.partitions=default
3687+
um_edges3_d.build.defines=
3688+
um_edges3_d.build.loop_core=
3689+
um_edges3_d.build.event_core=
3690+
um_edges3_d.build.flash_type=qio
3691+
um_edges3_d.build.psram_type=qspi
3692+
um_edges3_d.build.memory_type=qio_qspi
3693+
3694+
um_edges3_d.menu.LoopCore.1=Core 1
3695+
um_edges3_d.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
3696+
um_edges3_d.menu.LoopCore.0=Core 0
3697+
um_edges3_d.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
3698+
3699+
um_edges3_d.menu.EventsCore.1=Core 1
3700+
um_edges3_d.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
3701+
um_edges3_d.menu.EventsCore.0=Core 0
3702+
um_edges3_d.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
3703+
3704+
um_edges3_d.menu.USBMode.hwcdc=Hardware CDC and JTAG
3705+
um_edges3_d.menu.USBMode.hwcdc.build.usb_mode=1
3706+
um_edges3_d.menu.USBMode.default=USB-OTG (TinyUSB)
3707+
um_edges3_d.menu.USBMode.default.build.usb_mode=0
3708+
3709+
um_edges3_d.menu.CDCOnBoot.cdc=Enabled
3710+
um_edges3_d.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
3711+
um_edges3_d.menu.CDCOnBoot.default=Disabled
3712+
um_edges3_d.menu.CDCOnBoot.default.build.cdc_on_boot=0
3713+
3714+
um_edges3_d.menu.MSCOnBoot.default=Disabled
3715+
um_edges3_d.menu.MSCOnBoot.default.build.msc_on_boot=0
3716+
um_edges3_d.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
3717+
um_edges3_d.menu.MSCOnBoot.msc.build.msc_on_boot=1
3718+
3719+
um_edges3_d.menu.DFUOnBoot.default=Disabled
3720+
um_edges3_d.menu.DFUOnBoot.default.build.dfu_on_boot=0
3721+
um_edges3_d.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
3722+
um_edges3_d.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
3723+
3724+
um_edges3_d.menu.UploadMode.cdc.upload.wait_for_upload_port=true
3725+
um_edges3_d.menu.UploadMode.default=UART0 / Hardware CDC
3726+
um_edges3_d.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
3727+
um_edges3_d.menu.UploadMode.cdc.upload.use_1200bps_touch=true
3728+
um_edges3_d.menu.UploadMode.default.upload.use_1200bps_touch=false
3729+
um_edges3_d.menu.UploadMode.default.upload.wait_for_upload_port=false
3730+
3731+
um_edges3_d.menu.PSRAM.enabled=Enabled
3732+
um_edges3_d.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
3733+
um_edges3_d.menu.PSRAM.disabled=Disabled
3734+
um_edges3_d.menu.PSRAM.disabled.build.defines=
3735+
3736+
um_edges3_d.menu.PartitionScheme.default_8MB=Default (3MB APP/1.5MB SPIFFS)
3737+
um_edges3_d.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
3738+
um_edges3_d.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
3739+
3740+
um_edges3_d.menu.CPUFreq.240=240MHz (WiFi)
3741+
um_edges3_d.menu.CPUFreq.240.build.f_cpu=240000000L
3742+
um_edges3_d.menu.CPUFreq.160=160MHz (WiFi)
3743+
um_edges3_d.menu.CPUFreq.160.build.f_cpu=160000000L
3744+
um_edges3_d.menu.CPUFreq.80=80MHz (WiFi)
3745+
um_edges3_d.menu.CPUFreq.80.build.f_cpu=80000000L
3746+
um_edges3_d.menu.CPUFreq.40=40MHz
3747+
um_edges3_d.menu.CPUFreq.40.build.f_cpu=40000000L
3748+
um_edges3_d.menu.CPUFreq.20=20MHz
3749+
um_edges3_d.menu.CPUFreq.20.build.f_cpu=20000000L
3750+
um_edges3_d.menu.CPUFreq.10=10MHz
3751+
um_edges3_d.menu.CPUFreq.10.build.f_cpu=10000000L
3752+
3753+
um_edges3_d.menu.FlashMode.qio=QIO
3754+
um_edges3_d.menu.FlashMode.qio.build.flash_mode=dio
3755+
um_edges3_d.menu.FlashMode.qio.build.boot=qio
3756+
um_edges3_d.menu.FlashMode.dio=DIO
3757+
um_edges3_d.menu.FlashMode.dio.build.flash_mode=dio
3758+
um_edges3_d.menu.FlashMode.dio.build.boot=dio
3759+
3760+
um_edges3_d.menu.UploadSpeed.921600=921600
3761+
um_edges3_d.menu.UploadSpeed.921600.upload.speed=921600
3762+
um_edges3_d.menu.UploadSpeed.115200=115200
3763+
um_edges3_d.menu.UploadSpeed.115200.upload.speed=115200
3764+
um_edges3_d.menu.UploadSpeed.256000.windows=256000
3765+
um_edges3_d.menu.UploadSpeed.256000.upload.speed=256000
3766+
um_edges3_d.menu.UploadSpeed.230400.windows.upload.speed=256000
3767+
um_edges3_d.menu.UploadSpeed.230400=230400
3768+
um_edges3_d.menu.UploadSpeed.230400.upload.speed=230400
3769+
um_edges3_d.menu.UploadSpeed.460800.linux=460800
3770+
um_edges3_d.menu.UploadSpeed.460800.macosx=460800
3771+
um_edges3_d.menu.UploadSpeed.460800.upload.speed=460800
3772+
um_edges3_d.menu.UploadSpeed.512000.windows=512000
3773+
um_edges3_d.menu.UploadSpeed.512000.upload.speed=512000
3774+
3775+
um_edges3_d.menu.DebugLevel.none=None
3776+
um_edges3_d.menu.DebugLevel.none.build.code_debug=0
3777+
um_edges3_d.menu.DebugLevel.error=Error
3778+
um_edges3_d.menu.DebugLevel.error.build.code_debug=1
3779+
um_edges3_d.menu.DebugLevel.warn=Warn
3780+
um_edges3_d.menu.DebugLevel.warn.build.code_debug=2
3781+
um_edges3_d.menu.DebugLevel.info=Info
3782+
um_edges3_d.menu.DebugLevel.info.build.code_debug=3
3783+
um_edges3_d.menu.DebugLevel.debug=Debug
3784+
um_edges3_d.menu.DebugLevel.debug.build.code_debug=4
3785+
um_edges3_d.menu.DebugLevel.verbose=Verbose
3786+
um_edges3_d.menu.DebugLevel.verbose.build.code_debug=5
3787+
3788+
um_edges3_d.menu.EraseFlash.none=Disabled
3789+
um_edges3_d.menu.EraseFlash.none.upload.erase_cmd=
3790+
um_edges3_d.menu.EraseFlash.all=Enabled
3791+
um_edges3_d.menu.EraseFlash.all.upload.erase_cmd=-e
3792+
3793+
##############################################################
3794+
36463795
um_feathers2.name=UM FeatherS2
36473796
um_feathers2.vid.0=0x239A
36483797
um_feathers2.pid.0=0x80AB
@@ -4735,6 +4884,163 @@ um_pros3.menu.EraseFlash.all.upload.erase_cmd=-e
47354884

47364885
##############################################################
47374886

4887+
um_squixl.name=UM SQUIXL
4888+
um_squixl.vid.0=0x303a
4889+
um_squixl.pid.0=0x82DF
4890+
um_squixl.upload_port.0.vid=0x303a
4891+
um_squixl.upload_port.0.pid=0x82DF
4892+
4893+
um_squixl.bootloader.tool=esptool_py
4894+
um_squixl.bootloader.tool.default=esptool_py
4895+
4896+
um_squixl.upload.tool=esptool_py
4897+
um_squixl.upload.tool.default=esptool_py
4898+
um_squixl.upload.tool.network=esp_ota
4899+
4900+
um_squixl.upload.maximum_size=1310720
4901+
um_squixl.upload.maximum_data_size=327680
4902+
um_squixl.upload.flags=
4903+
um_squixl.upload.extra_flags=
4904+
um_squixl.upload.use_1200bps_touch=false
4905+
um_squixl.upload.wait_for_upload_port=false
4906+
4907+
um_squixl.serial.disableDTR=false
4908+
um_squixl.serial.disableRTS=false
4909+
4910+
um_squixl.build.tarch=xtensa
4911+
um_squixl.build.bootloader_addr=0x0
4912+
um_squixl.build.target=esp32s3
4913+
um_squixl.build.mcu=esp32s3
4914+
um_squixl.build.core=esp32
4915+
um_squixl.build.variant=um_squixl
4916+
um_squixl.build.board=SQUIXL
4917+
4918+
um_squixl.build.usb_mode=1
4919+
um_squixl.build.cdc_on_boot=1
4920+
um_squixl.build.msc_on_boot=0
4921+
um_squixl.build.dfu_on_boot=0
4922+
um_squixl.build.f_cpu=240000000L
4923+
um_squixl.build.flash_size=16MB
4924+
um_squixl.build.flash_freq=80m
4925+
um_squixl.build.flash_mode=dio
4926+
um_squixl.build.boot=qio
4927+
um_squixl.build.partitions=default
4928+
um_squixl.build.defines=
4929+
um_squixl.build.loop_core=
4930+
um_squixl.build.event_core=
4931+
um_squixl.build.flash_type=qio
4932+
um_squixl.build.psram_type=opi
4933+
um_squixl.build.memory_type=qio_opi
4934+
4935+
um_squixl.menu.LoopCore.1=Core 1
4936+
um_squixl.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
4937+
um_squixl.menu.LoopCore.0=Core 0
4938+
um_squixl.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
4939+
4940+
um_squixl.menu.EventsCore.1=Core 1
4941+
um_squixl.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
4942+
um_squixl.menu.EventsCore.0=Core 0
4943+
um_squixl.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
4944+
4945+
um_squixl.menu.USBMode.hwcdc=Hardware CDC and JTAG
4946+
um_squixl.menu.USBMode.hwcdc.build.usb_mode=1
4947+
um_squixl.menu.USBMode.default=USB-OTG (TinyUSB)
4948+
um_squixl.menu.USBMode.default.build.usb_mode=0
4949+
4950+
um_squixl.menu.CDCOnBoot.cdc=Enabled
4951+
um_squixl.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
4952+
um_squixl.menu.CDCOnBoot.default=Disabled
4953+
um_squixl.menu.CDCOnBoot.default.build.cdc_on_boot=0
4954+
4955+
um_squixl.menu.MSCOnBoot.default=Disabled
4956+
um_squixl.menu.MSCOnBoot.default.build.msc_on_boot=0
4957+
um_squixl.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
4958+
um_squixl.menu.MSCOnBoot.msc.build.msc_on_boot=1
4959+
4960+
um_squixl.menu.DFUOnBoot.default=Disabled
4961+
um_squixl.menu.DFUOnBoot.default.build.dfu_on_boot=0
4962+
um_squixl.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
4963+
um_squixl.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
4964+
4965+
um_squixl.menu.UploadMode.cdc.upload.wait_for_upload_port=true
4966+
um_squixl.menu.UploadMode.default=UART0 / Hardware CDC
4967+
um_squixl.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
4968+
um_squixl.menu.UploadMode.cdc.upload.use_1200bps_touch=true
4969+
um_squixl.menu.UploadMode.default.upload.use_1200bps_touch=false
4970+
um_squixl.menu.UploadMode.default.upload.wait_for_upload_port=false
4971+
4972+
um_squixl.menu.PSRAM.opi=OPI PSRAM
4973+
um_squixl.menu.PSRAM.opi.build.defines=-DBOARD_HAS_PSRAM
4974+
um_squixl.menu.PSRAM.opi.build.psram_type=opi
4975+
4976+
um_squixl.menu.PartitionScheme.default_16MB=Default (6.25MB APP/3.43MB SPIFFS)
4977+
um_squixl.menu.PartitionScheme.default_16MB.build.partitions=default_16MB
4978+
um_squixl.menu.PartitionScheme.default_16MB.upload.maximum_size=6553600
4979+
um_squixl.menu.PartitionScheme.large_spiffs=Large SPIFFS (4.5MB APP/6.93MB SPIFFS)
4980+
um_squixl.menu.PartitionScheme.large_spiffs.build.partitions=large_spiffs_16MB
4981+
um_squixl.menu.PartitionScheme.large_spiffs.upload.maximum_size=4718592
4982+
um_squixl.menu.PartitionScheme.app3M_fat9M_16MB=FFAT (3MB APP/9MB FATFS)
4983+
um_squixl.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
4984+
um_squixl.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
4985+
um_squixl.menu.PartitionScheme.fatflash=Large FFAT (2MB APP/12.5MB FATFS)
4986+
um_squixl.menu.PartitionScheme.fatflash.build.partitions=ffat
4987+
um_squixl.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
4988+
4989+
um_squixl.menu.CPUFreq.240=240MHz (WiFi)
4990+
um_squixl.menu.CPUFreq.240.build.f_cpu=240000000L
4991+
um_squixl.menu.CPUFreq.160=160MHz (WiFi)
4992+
um_squixl.menu.CPUFreq.160.build.f_cpu=160000000L
4993+
um_squixl.menu.CPUFreq.80=80MHz (WiFi)
4994+
um_squixl.menu.CPUFreq.80.build.f_cpu=80000000L
4995+
um_squixl.menu.CPUFreq.40=40MHz
4996+
um_squixl.menu.CPUFreq.40.build.f_cpu=40000000L
4997+
um_squixl.menu.CPUFreq.20=20MHz
4998+
um_squixl.menu.CPUFreq.20.build.f_cpu=20000000L
4999+
um_squixl.menu.CPUFreq.10=10MHz
5000+
um_squixl.menu.CPUFreq.10.build.f_cpu=10000000L
5001+
5002+
um_squixl.menu.FlashMode.qio=QIO
5003+
um_squixl.menu.FlashMode.qio.build.flash_mode=dio
5004+
um_squixl.menu.FlashMode.qio.build.boot=qio
5005+
um_squixl.menu.FlashMode.dio=DIO
5006+
um_squixl.menu.FlashMode.dio.build.flash_mode=dio
5007+
um_squixl.menu.FlashMode.dio.build.boot=dio
5008+
5009+
um_squixl.menu.UploadSpeed.921600=921600
5010+
um_squixl.menu.UploadSpeed.921600.upload.speed=921600
5011+
um_squixl.menu.UploadSpeed.115200=115200
5012+
um_squixl.menu.UploadSpeed.115200.upload.speed=115200
5013+
um_squixl.menu.UploadSpeed.256000.windows=256000
5014+
um_squixl.menu.UploadSpeed.256000.upload.speed=256000
5015+
um_squixl.menu.UploadSpeed.230400.windows.upload.speed=256000
5016+
um_squixl.menu.UploadSpeed.230400=230400
5017+
um_squixl.menu.UploadSpeed.230400.upload.speed=230400
5018+
um_squixl.menu.UploadSpeed.460800.linux=460800
5019+
um_squixl.menu.UploadSpeed.460800.macosx=460800
5020+
um_squixl.menu.UploadSpeed.460800.upload.speed=460800
5021+
um_squixl.menu.UploadSpeed.512000.windows=512000
5022+
um_squixl.menu.UploadSpeed.512000.upload.speed=512000
5023+
5024+
um_squixl.menu.DebugLevel.none=None
5025+
um_squixl.menu.DebugLevel.none.build.code_debug=0
5026+
um_squixl.menu.DebugLevel.error=Error
5027+
um_squixl.menu.DebugLevel.error.build.code_debug=1
5028+
um_squixl.menu.DebugLevel.warn=Warn
5029+
um_squixl.menu.DebugLevel.warn.build.code_debug=2
5030+
um_squixl.menu.DebugLevel.info=Info
5031+
um_squixl.menu.DebugLevel.info.build.code_debug=3
5032+
um_squixl.menu.DebugLevel.debug=Debug
5033+
um_squixl.menu.DebugLevel.debug.build.code_debug=4
5034+
um_squixl.menu.DebugLevel.verbose=Verbose
5035+
um_squixl.menu.DebugLevel.verbose.build.code_debug=5
5036+
5037+
um_squixl.menu.EraseFlash.none=Disabled
5038+
um_squixl.menu.EraseFlash.none.upload.erase_cmd=
5039+
um_squixl.menu.EraseFlash.all=Enabled
5040+
um_squixl.menu.EraseFlash.all.upload.erase_cmd=-e
5041+
5042+
##############################################################
5043+
47385044
um_tinypico.name=UM TinyPICO
47395045

47405046
um_tinypico.bootloader.tool=esptool_py

‎variants/um_edges3_d/pins_arduino.h

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
#ifndef Pins_Arduino_h
2+
#define Pins_Arduino_h
3+
4+
#include <stdint.h>
5+
#include "soc/soc_caps.h"
6+
7+
#define USB_VID 0x303A
8+
#define USB_PID 0x82DC
9+
#define USB_MANUFACTURER "Unexpected Maker"
10+
#define USB_PRODUCT "EdgeS3[D]"
11+
#define USB_SERIAL ""
12+
13+
static const uint8_t TX = 43;
14+
static const uint8_t RX = 44;
15+
16+
static const uint8_t SDA = 8;
17+
static const uint8_t SCL = 9;
18+
19+
static const uint8_t SS = 34;
20+
static const uint8_t MOSI = 35;
21+
static const uint8_t MISO = 37;
22+
static const uint8_t SDO = 35;
23+
static const uint8_t SDI = 37;
24+
static const uint8_t SCK = 36;
25+
26+
static const uint8_t A0 = 1;
27+
static const uint8_t A1 = 2;
28+
static const uint8_t A2 = 3;
29+
static const uint8_t A3 = 4;
30+
static const uint8_t A4 = 5;
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static const uint8_t A5 = 6;
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static const uint8_t A6 = 7;
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static const uint8_t A7 = 8;
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static const uint8_t A8 = 9;
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static const uint8_t T1 = 1;
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static const uint8_t T2 = 2;
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static const uint8_t T3 = 3;
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static const uint8_t T4 = 4;
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static const uint8_t T5 = 5;
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static const uint8_t T6 = 6;
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static const uint8_t T7 = 7;
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static const uint8_t T8 = 8;
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static const uint8_t T9 = 9;
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#endif /* Pins_Arduino_h */

‎variants/um_squixl/pins_arduino.h

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#ifndef Pins_Arduino_h
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#define Pins_Arduino_h
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#include <stdint.h>
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#include "soc/soc_caps.h"
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#define USB_VID 0x303A
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#define USB_PID 0x82DF
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#define USB_MANUFACTURER "Unexpected Maker"
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#define USB_PRODUCT "SQUiXL"
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#define USB_SERIAL ""
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static const uint8_t SDA = 1;
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static const uint8_t SCL = 2;
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static const uint8_t SS = 42;
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static const uint8_t MOSI = 46;
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static const uint8_t MISO = 41;
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static const uint8_t SDO = 46;
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static const uint8_t SDI = 41;
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static const uint8_t SCK = 45;
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#endif /* Pins_Arduino_h */

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