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Commit 6f672af

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Fixing wrong included header (Wire.h is needed instead of Arduino.h)
1 parent cb02dd9 commit 6f672af

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4 files changed

+6
-174
lines changed

4 files changed

+6
-174
lines changed

‎libraries/ENVIE_Video_Firefly/PROC_Main.c‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,12 +22,10 @@ Revision History:
2222

2323
#include "config.h"
2424
#include "debug.h"
25-
#include "EFM8UB2/EFM8UB2_helper.h"
2625
#include "MI2.h"
2726
#include "Flash.h"
2827
#include "MI2_REG.h"
2928
#include "REG_DRV.h"
30-
#include "I2C_SW/REG_DRV1.h"
3129
#include "common/private_interface.h"
3230
#ifdef USE_PD30
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#include "pd_ext_message.h"

‎libraries/ENVIE_Video_Firefly/REG_DRV.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ Revision History:
2020
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******************************************************************************/
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23-
#include "Arduino.h"
23+
#include <Wire.h>
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2525
void patch_for_read_reg(unsigned char DevAddr);
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‎libraries/ENVIE_Video_Firefly/config.h‎

Lines changed: 5 additions & 156 deletions
Original file line numberDiff line numberDiff line change
@@ -23,112 +23,16 @@ Revision History:
2323
#ifndef __CONFIG_H__
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#define __CONFIG_H__
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26-
#include "defs.h"
27-
#include "EFM8UB2/SI_EFM8UB2_Defs.h"
26+
#include "Arduino.h"
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29-
/* ========================================================================== */
30-
// EFM8UB20F64G MCU pin configuration, which is board dependent
31-
sbit RESET_N = P1^1;
32-
sbit POWER_EN = P1^2;
33-
34-
sbit PWR_CTRL_V10 = P0^0; // controls AVDD10, DVDD10L, and DVDD10G
35-
sbit PWR_CTRL_V18 = P0^1; // controls AVDD18 and DVDD18
36-
sbit PWR_CTRL_V30 = P2^5; // controls AVDD30 (ANX7625) or AVDD3V3 (ANX7688)
37-
38-
sbit ALERT_N = P0^6;
39-
sbit CABLE_DET = P1^3;
40-
41-
sbit SDA = P1^6; // I2C master 0 is on P1.6 and P1.7, which is connected to ANX7625
42-
sbit SCL = P1^7;
43-
44-
sbit CLK_SRC_DET = P2^2; // enable NBC12429 or not
45-
sbit LED_D_EXM = P2^3;
46-
sbit SW5_1 = P2^6;
47-
sbit SW5_2 = P1^4;
48-
sbit SW5_3 = P1^0;
49-
sbit SW5_4 = P0^7;
50-
51-
sbit VBUS_DISCHARGE_CRTL_N = P2^4; // 0: enable discharge; 1: disable discharge
52-
sbit AP_VBUS_CTRL = P2^7;
28+
PinName RESET_N = PJ_3;
29+
PinName POWER_EN = PK_2;
5330

54-
sbitM_bit8=P3^4;
55-
#defineM_bits7_0 P4 // note: P4 port is not bit-addressable.
31+
PinNameALERT_N=PK_4;
32+
PinNameCABLE_DET=PK_3;
5633

57-
sbit N0 = P3^5;
58-
sbit N1 = P3^6;
59-
60-
sbit P_LOAD_N = P3^7; // active low P_LOAD input of NBC12429
61-
// END of EFM8UB20F64G MCU pin configuration, which is board dependent
62-
/* ========================================================================== */
63-
64-
// macros for EFM8UB20F64G MCU
65-
#define BAUDRATE 115200UL // baud rate in bps
66-
#define US_PER_CHARACTER ((float)1000000 * (1 + 8 + 1) / BAUDRATE * 2)
67-
#define TMR1_RELOAD (unsigned char)(256 - (float)SYSCLK / 2 / BAUDRATE + 0.5)
68-
69-
// macro TMR2_RELOAD controls I2C timing
70-
// SCL frequency = (48000 / 3 / (256 - TMR2_RELOAD)) kHz
71-
/* Timer2 reload value @48MHz
72-
* 0x00 - 62.5 kHz
73-
* 0x20 - 71.4 kHz
74-
* 0x40 - 83.3 kHz
75-
* 0x60 - 100 kHz (verified on MI-2 EVB)
76-
* 0x70 - 111.1 kHz
77-
* 0x80 - 125 kHz
78-
* 0x90 - 142.9 kHz
79-
* 0xA0 - 166.7 kHz
80-
* 0xB0 - 200 kHz
81-
* 0xC0 - 250 kHz
82-
* 0xD0 - 333.3 kHz
83-
* 0xD8 - 400 kHz (verified on MI-2 EVB)
84-
* 0xE0 - 500 kHz
85-
* 0xE1 - 516.1 kHz
86-
* 0xE2 - 533.3 kHz
87-
* 0xE3 - 551.7 kHz
88-
* 0xE4 - 571.4 kHz
89-
* 0xE5 - 592.6 kHz
90-
* 0xE6 - 615.4 kHz
91-
* 0xE7 - 640 kHz
92-
* 0xE8 - 666.7 kHz (MI-1 fails at this SCL frequency)
93-
* 0xEC - 800 kHz
94-
* 0xEE - 888.9 kHz
95-
* 0xF0 - 1000 kHz (verified on MI-2 EVB)
96-
* 0xF1 - 1066.7 kHz (verified on MI-2 EVB)
97-
* 0xF2 - 1142.9 kHz (Measured SCL frequency with Corelis I2C analyzer BusPro-I: 688kHz, possibly caused by clock stretching)
98-
* 0xF4 - 1333.3 kHz (Measured SCL frequency with Corelis I2C analyzer BusPro-I: 802kHz, possibly caused by clock stretching)
99-
*/
100-
#define TMR2_RELOAD 0xF0 // SMBus frequency
101-
#define mdelay(t) DELAY_US(1000*t)
102-
103-
/* ================= board dependent macros ============================== */
104-
// 1. General control logic
10534
#define IS_ALERT() (!ALERT_N)
10635

107-
#define LED_D_EXM_ON() LED_D_EXM = 0
108-
#define LED_D_EXM_OFF() LED_D_EXM = 1
109-
110-
// 2. I2C addresses of LED display driver MAX6958 and battery gas gauge LTC2943
111-
#define MAX6958_ADDR 0x70
112-
#define LTC2943_ADDR 0xC8
113-
114-
// 3. Silicon Labs EFM8UB2 MCU related
115-
// a) serial communication interface
116-
#define CHECK_TRANSMIT_INTERRUPT() (SCON0_TI)
117-
#define CHECK_RECEIVE_INTERRUPT() (SCON0_RI)
118-
#define CLEAR_TRANSMIT_INTERRUPT() (SCON0_TI = 0)
119-
#define CLEAR_RECEIVE_INTERRUPT() (SCON0_RI = 0)
120-
#define TRIGGER_TRANSMIT() (SCON0_TI = 1)
121-
#define WRITE_SBUF(c) (SBUF0 = c)
122-
#define READ_SBUF() (SBUF0)
123-
124-
// b) serial communication buffer
125-
#define SERIAL_RECV_BUF_SIZE (256 + 256)
126-
#define SERIAL_SEND_BUF_SIZE (256 + 256)
127-
#define CMD_LINE_SIZE (128)
128-
#define CMD_NAME_SIZE (16)
129-
130-
// 4. system board configuration
131-
#define SYSCLK 48000000UL // System clock frequency in Hz, 48MHz
13236
#define XTAL_FRQ 27000000UL // MI-2 clock frequency in Hz: 27 MHz
13337
#define XTAL_FRQ_MHz ((unsigned char)(XTAL_FRQ/1000000UL)) // MI-2 clock frequency in MHz
13438

@@ -156,60 +60,5 @@ sbit P_LOAD_N = P3^7; // active low P_LOAD input of NBC12429
15660
// END of I2C addresses of Analogix's chip modules, which is chip dependent
15761
/* ========================================================================== */
15862

159-
160-
// misc macros which are bringup program dependent
161-
#define MAX_BYTE_COUNT_PER_RECORD_FLASH 16
162-
163-
164-
////////////////////////////////////////////////////////////////////////////////
165-
// general timer
166-
#define CYCLE_TIMER0(us) (unsigned int)(65536UL - (float)SYSCLK / 48 / 1000000UL * (us) + 0.5)
167-
#define START_TIMER0(us) do{TL0 = CYCLE_TIMER0(us) % 256; TH0 = CYCLE_TIMER0(us) / 256; TCON_TR0 = 1;}while(0)
168-
#define DELAY_US(t) do{START_TIMER0(t); while(!TCON_TF0); TCON_TR0 = 0; TCON_TF0 = 0;}while(0)
169-
#define STOP_TIMER0() TCON_TR0 = 0
170-
#define CHECK_TIMER0() (TCON_TF0)
171-
#define CLEAR_TIMER0() TCON_TF0 = 0
172-
#define STOP_AND_CLEAR_TIMER0() do{TCON_TR0 = 0; TCON_TF0 = 0;}while(0)
173-
174-
//#define START_TIMER2(us) do{TMR2 = (unsigned int)(65536UL - (float)SYSCLK / 12 / 1000000UL * us + 0.5); TMR2CN0_TR2 = 1;}while(0)
175-
//#define START_TIMER2_N(us) do{TMR2RL = (unsigned int)(65536UL - (float)SYSCLK / 12 / 1000000UL * us + 0.5); TMR2 = TMR2RL; TMR2CN0_TR2 = 1;}while(0)
176-
//#define STOP_TIMER2() do{TMR2CN0_TR2 = 0; TMR2CN0_TF2H = 0;}while(0)
177-
//#define CHECK_TIMER2() (TMR2CN0_TF2H)
178-
//#define CLEAR_TIMER2() (TMR2CN0_TF2H = 0)
179-
//#define DELAY_US(t) do{START_TIMER2(t); while(TMR2CN0_TF2H == 0); TMR2CN0_TF2H = 0; TMR2CN0_TR2 = 0;}while(0)
180-
181-
#define START_TIMER3_N(us) do{TMR3RL = (unsigned int)(65536UL - (float)SYSCLK / 12 / 1000000UL * us + 0.5); TMR3 = TMR3RL; TMR3CN0 |= 1<<TMR3CN_TR3;}while(0)
182-
#define CHECK_TIMER3() BIT_IS_0(TMR3CN0, TMR3CN_TF3H)
183-
#define CLEAR_TIMER3() BITCLEAR(TMR3CN0, TMR3CN_TF3H)
184-
#define STOP_TIMER3() BITCLEAR(TMR3CN0, TMR3CN_TR3)
185-
#define STOP_AND_CLEAR_TIMER3() do{TMR3CN0 &= ~(BITMASK(TMR3CN_TF3H) | BITMASK(TMR3CN_TR3));}while(0)
186-
187-
//#define CYCLE_PCA_TIMER0(us) (unsigned int)(65536UL - (float)SYSCLK / 12 / 1000000UL * (us) + 0.5)
188-
//#define START_PCA_TIMER0(us) do{PCA0 = CYCLE_PCA_TIMER0(us); PCA0CN0_CR = 1;}while(0)
189-
//#define CHECK_PCA_TIMER0() (PCA0CN0_CF)
190-
//#define CLEAR_PCA_TIMER0() (PCA0CN0_CF = 0)
191-
//#define STOP_AND_CLEAR_PCA_TIMER0() do{PCA0CN0_CR = 0; PCA0CN0_CF = 0;}while(0)
192-
193-
#define CYCLE_PCA_TIMER(us) (unsigned int)((float)SYSCLK / 12 / 1000000UL * (us) + 0.5)
194-
// PCA timer0 is used in SOP' message transaction
195-
#define CHECK_PCA_TIMER0() (PCA0CN0_CCF0)
196-
#define CLEAR_PCA_TIMER0() (PCA0CN0_CCF0 = 0)
197-
#define RELOAD_PCA_TIMER0(us) do{PCA0CP0 += CYCLE_PCA_TIMER(us);}while(0)
198-
#define RELOAD_AND_CLEAR_PCA_TIMER0(us) do{PCA0CP0 += CYCLE_PCA_TIMER(us); PCA0CN0_CCF0 = 0;}while(0)
199-
200-
// PCA timer1 is used in LED D_EXM and ADC
201-
#define CHECK_PCA_TIMER1() (PCA0CN0_CCF1)
202-
#define CLEAR_PCA_TIMER1() (PCA0CN0_CCF1 = 0)
203-
#define RELOAD_PCA_TIMER1(us) do{PCA0CP1 += CYCLE_PCA_TIMER(us);}while(0)
204-
#define RELOAD_AND_CLEAR_PCA_TIMER1(us) do{PCA0CP1 += CYCLE_PCA_TIMER(us); PCA0CN0_CCF1 = 0;}while(0)
205-
206-
// PCA timer2 is used in USBC for CC debounce and PD debounce
207-
#define CHECK_PCA_TIMER2() (PCA0CN0_CCF2)
208-
#define CLEAR_PCA_TIMER2() (PCA0CN0_CCF2 = 0)
209-
#define RELOAD_PCA_TIMER2(us) do{PCA0CP2 += CYCLE_PCA_TIMER(us);}while(0)
210-
#define RELOAD_AND_CLEAR_PCA_TIMER2(us) do{PCA0CP2 += CYCLE_PCA_TIMER(us); PCA0CN0_CCF2 = 0;}while(0)
211-
212-
#define OFFSET(s, m) (unsigned char)&(((s code *)0)->m)
213-
21463
#endif /* __CONFIG_H__ */
21564

‎libraries/ENVIE_Video_Firefly/main.c‎

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -23,9 +23,7 @@ Revision History:
2323
#include "config.h"
2424
#include "debug.h"
2525
#include "debug/cmd.h"
26-
#include "MCUInit.h"
2726
#include "debug/serial.h"
28-
#include "EFM8UB2/EFM8UB2_helper.h"
2927
#include "MI2.h"
3028
#include "ENVIE_Video_Firefly.h"
3129

@@ -49,19 +47,6 @@ void anx7625_setup(void)
4947
ANX7625_POWER_DOWN(); // power down chip before port initialization
5048
ANX7625_RESET(); // reset chip before port initialization
5149

52-
/* ========== MCU init ========== */
53-
Monitor_Init();
54-
SYSCLKInit(); // <===== further study from here!
55-
SMBusRecover();
56-
PortInit();
57-
TimerInit();
58-
SMBusInit();
59-
PCAInit();
60-
UARTInit();
61-
SerialInit();
62-
63-
IE_EA = 1;
64-
6550
TRACE2("\nMI-2 EVB FW v%bd.%bd\n", (unsigned char)FW_MAJOR_VERSION, (unsigned char)FW_MINOR_VERSION);
6651
TRACE2("Build at: %s, %s\n\n", __DATE__, __TIME__);
6752

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