Commit 87236bc

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Merge pull request #345 from Vitve4/pr_344

Improve reading ADC result

2 parents 6ec8015 + 4fd3801 commit 87236bcCopy full SHA for 87236bc

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Lines changed: 5 additions & 13 deletions

Original file line number	Diff line number	Diff line change
`@@ -37,7 +37,6 @@ void analogReference(uint8_t mode)`
`37`	`37`
`38`	`38`	`int analogRead(uint8_t pin)`
`39`	`39`	`{`
`40`		`- uint8_t low, high;`
`41`	`40`
`42`	`41`	`#if defined(analogPinToChannel)`
`43`	`42`	`#if defined(__AVR_ATmega32U4__)`
`@@ -74,27 +73,20 @@ int analogRead(uint8_t pin)`
`74`	`73`	`// without a delay, we seem to read from the wrong channel`
`75`	`74`	`//delay(1);`
`76`	`75`
`77`		`-#if defined(ADCSRA) && defined(ADCL)`
	`76`	`+#if defined(ADCSRA) && defined(ADC)`
`78`	`77`	`// start the conversion`
`79`	`78`	`sbi(ADCSRA, ADSC);`
`80`	`79`
`81`	`80`	`// ADSC is cleared when the conversion finishes`
`82`	`81`	`while (bit_is_set(ADCSRA, ADSC));`
`83`	`82`
`84`		`- // we have to read ADCL first; doing so locks both ADCL`
`85`		`- // and ADCH until ADCH is read. reading ADCL second would`
`86`		`- // cause the results of each conversion to be discarded,`
`87`		`- // as ADCL and ADCH would be locked when it completed.`
`88`		`- low = ADCL;`
`89`		`- high = ADCH;`
	`83`	`+ // ADC macro takes care of reading ADC register.`
	`84`	`+ // avr-gcc implements the proper reading order: ADCL is read first.`
	`85`	`+ return ADC;`
`90`	`86`	`#else`
`91`	`87`	`// we dont have an ADC, return 0`
`92`		`- low = 0;`
`93`		`- high = 0;`
	`88`	`+ return 0;`
`94`	`89`	`#endif`
`95`		`-`
`96`		`- // combine the two bytes`
`97`		`- return (high << 8) \| low;`
`98`	`90`	`}`
`99`	`91`
`100`	`92`	`// Right now, PWM output only works on the pins with`

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