@@ -34,33 +34,42 @@ typedef enum {
3434 SPI_MODE3 = 3 ,
3535} SPIMode;
3636
37+ // Platforms should define SPI_HAS_PERIPHERAL_MODE if SPI peripheral
38+ // mode is supported, to allow applications to check whether peripheral
39+ // mode is available or not.
40+ typedef enum {
41+ SPI_CONTROLLER = 0 ,
42+ SPI_PERIPHERAL = 1 ,
43+ } SPIBusMode;
44+ 3745
3846class SPISettings {
3947 public:
40- SPISettings (uint32_t clock, BitOrder bitOrder, SPIMode dataMode) {
48+ SPISettings (uint32_t clock, BitOrder bitOrder, SPIMode dataMode, SPIBusMode busMode = SPI_CONTROLLER ) {
4149 if (__builtin_constant_p (clock)) {
42- init_AlwaysInline (clock, bitOrder, dataMode);
50+ init_AlwaysInline (clock, bitOrder, dataMode, busMode );
4351 } else {
44- init_MightInline (clock, bitOrder, dataMode);
52+ init_MightInline (clock, bitOrder, dataMode, busMode );
4553 }
4654 }
4755
48- SPISettings (uint32_t clock, BitOrder bitOrder, int dataMode) {
56+ SPISettings (uint32_t clock, BitOrder bitOrder, int dataMode, SPIBusMode busMode = SPI_CONTROLLER ) {
4957 if (__builtin_constant_p (clock)) {
50- init_AlwaysInline (clock, bitOrder, (SPIMode)dataMode);
58+ init_AlwaysInline (clock, bitOrder, (SPIMode)dataMode, busMode );
5159 } else {
52- init_MightInline (clock, bitOrder, (SPIMode)dataMode);
60+ init_MightInline (clock, bitOrder, (SPIMode)dataMode, busMode );
5361 }
5462 }
5563
5664 // Default speed set to 4MHz, SPI mode set to MODE 0 and Bit order set to MSB first.
57- SPISettings () { init_AlwaysInline (4000000 , MSBFIRST, SPI_MODE0); }
65+ SPISettings () { init_AlwaysInline (4000000 , MSBFIRST, SPI_MODE0, SPI_CONTROLLER ); }
5866
5967 bool operator ==(const SPISettings& rhs) const
6068 {
6169 if ((this ->clockFreq == rhs.clockFreq ) &&
6270 (this ->bitOrder == rhs.bitOrder ) &&
63- (this ->dataMode == rhs.dataMode )) {
71+ (this ->dataMode == rhs.dataMode ) &&
72+ (this ->busMode == rhs.busMode )) {
6473 return true ;
6574 }
6675 return false ;
@@ -80,22 +89,27 @@ class SPISettings {
8089 BitOrder getBitOrder () const {
8190 return (bitOrder);
8291 }
92+ SPIBusMode getBusMode () const {
93+ return busMode;
94+ }
8395
8496 private:
85- void init_MightInline (uint32_t clock, BitOrder bitOrder, SPIMode dataMode) {
86- init_AlwaysInline (clock, bitOrder, dataMode);
97+ void init_MightInline (uint32_t clock, BitOrder bitOrder, SPIMode dataMode, SPIBusMode busMode ) {
98+ init_AlwaysInline (clock, bitOrder, dataMode, busMode );
8799 }
88100
89101 // Core developer MUST use an helper function in beginTransaction() to use this data
90- void init_AlwaysInline (uint32_t clock, BitOrder bitOrder, SPIMode dataMode) __attribute__((__always_inline__)) {
102+ void init_AlwaysInline (uint32_t clock, BitOrder bitOrder, SPIMode dataMode, SPIBusMode busMode ) __attribute__((__always_inline__)) {
91103 this ->clockFreq = clock;
92104 this ->dataMode = dataMode;
93105 this ->bitOrder = bitOrder;
106+ this ->busMode = busMode;
94107 }
95108
96109 uint32_t clockFreq;
97110 SPIMode dataMode;
98111 BitOrder bitOrder;
112+ SPIBusMode busMode;
99113
100114 friend class HardwareSPI ;
101115};
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