Commit d66eeb7

Jason2866pre-commit-ci-lite[bot]

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c5 flash base address is 0x2000 (espressif#11037)

* c5 flash base address is 0x2000 * ci(pre-commit): Apply automatic fixes --------- Co-authored-by: pre-commit-ci-lite[bot] <117423508+pre-commit-ci-lite[bot]@users.noreply.github.com>

1 parent 3fe2fe5 commit d66eeb7Copy full SHA for d66eeb7

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cores/esp32
- Esp.cpp

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`‎cores/esp32/Esp.cpp‎`

Lines changed: 3 additions & 3 deletions

Original file line number	Diff line number	Diff line change
`@@ -66,7 +66,7 @@ extern "C" {`
`66`	`66`	`#define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32p4 is located at 0x2000`
`67`	`67`	`#elif CONFIG_IDF_TARGET_ESP32C5`
`68`	`68`	`#include "esp32c5/rom/spi_flash.h"`
`69`		`-#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c5 is located at 0x0000`
	`69`	`+#define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32c5 is located at 0x2000`
`70`	`70`	`#else`
`71`	`71`	`#error Target CONFIG_IDF_TARGET is not supported`
`72`	`72`	`#endif`
`@@ -306,11 +306,11 @@ const char *EspClass::getChipModel(void) {`
`306`	`306`	`case CHIP_ESP32H2: return "ESP32-H2";`
`307`	`307`	`case CHIP_ESP32P4: return "ESP32-P4";`
`308`	`308`	`#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 5, 0)`
`309`		`- case CHIP_ESP32C5: return "ESP32-C5";`
	`309`	`+ case CHIP_ESP32C5: return "ESP32-C5";`
`310`	`310`	`case CHIP_ESP32C61: return "ESP32-C61";`
`311`	`311`	`case CHIP_ESP32H21: return "ESP32-H21";`
`312`	`312`	`#endif`
`313`		`- default: return "UNKNOWN";`
	`313`	`+ default: return "UNKNOWN";`
`314`	`314`	`}`
`315`	`315`	`#endif`
`316`	`316`	`}`

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`‎cores/esp32/Esp.cpp‎`

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