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Commit ae2ae8d

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Merge branch 'master' into release/v3.3.x
2 parents 998bf80 + f122366 commit ae2ae8d

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25 files changed

+695
-124
lines changed

25 files changed

+695
-124
lines changed

‎CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -300,6 +300,7 @@ set(ARDUINO_LIBRARY_Zigbee_SRCS
300300
libraries/Zigbee/src/ep/ZigbeeGateway.cpp
301301
libraries/Zigbee/src/ep/ZigbeeWindSpeedSensor.cpp
302302
libraries/Zigbee/src/ep/ZigbeeIlluminanceSensor.cpp
303+
libraries/Zigbee/src/ep/ZigbeePM25Sensor.cpp
303304
)
304305

305306
set(ARDUINO_LIBRARY_BLE_SRCS

‎cores/esp32/HWCDC.cpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -603,6 +603,7 @@ void HWCDC::setDebugOutput(bool en) {
603603
} else {
604604
ets_install_putc2(NULL);
605605
}
606+
ets_install_putc1(NULL); // closes UART log output
606607
}
607608

608609
#if ARDUINO_USB_MODE && ARDUINO_USB_CDC_ON_BOOT // Hardware JTAG CDC selected

‎cores/esp32/HardwareSerial.cpp‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -607,6 +607,24 @@ bool HardwareSerial::setMode(SerialMode mode) {
607607
return uartSetMode(_uart, mode);
608608
}
609609

610+
// Sets the UART Clock Source based on the compatible SoC options
611+
// This method must be called before starting UART using begin(), otherwise it won't have any effect.
612+
// Clock Source Options are:
613+
// UART_CLK_SRC_DEFAULT :: any SoC - it will set whatever IDF defines as the default UART Clock Source
614+
// UART_CLK_SRC_APB :: ESP32, ESP32-S2, ESP32-C3 and ESP32-S3
615+
// UART_CLK_SRC_PLL :: ESP32-C2, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2 and ESP32-P4
616+
// UART_CLK_SRC_XTAL :: ESP32-C2, ESP32-C3, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2, ESP32-S3 and ESP32-P4
617+
// UART_CLK_SRC_RTC :: ESP32-C2, ESP32-C3, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2, ESP32-S3 and ESP32-P4
618+
// UART_CLK_SRC_REF_TICK :: ESP32 and ESP32-S2
619+
// Note: CLK_SRC_PLL Freq depends on the SoC - ESP32-C2 has 40MHz, ESP32-H2 has 48MHz and ESP32-C5, C6, C61 and P4 has 80MHz
620+
// Note: ESP32-C6, C61, ESP32-P4 and ESP32-C5 have LP UART that will use only RTC_FAST or XTAL/2 as Clock Source
621+
bool HardwareSerial::setClockSource(SerialClkSrc clkSrc) {
622+
if (_uart) {
623+
log_e("No Clock Source change was done. This function must be called before beginning UART%d.", _uart_nr);
624+
return false;
625+
}
626+
return uartSetClockSource(_uart_nr, (uart_sclk_t)clkSrc);
627+
}
610628
// minimum total RX Buffer size is the UART FIFO space (128 bytes for most SoC) + 1. IDF imposition.
611629
// LP UART has FIFO of 16 bytes
612630
size_t HardwareSerial::setRxBufferSize(size_t new_size) {

‎cores/esp32/HardwareSerial.h‎

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -96,6 +96,29 @@ typedef enum {
9696
UART_PARITY_ERROR
9797
} hardwareSerial_error_t;
9898

99+
typedef enum {
100+
UART_CLK_SRC_DEFAULT = UART_SCLK_DEFAULT,
101+
#if SOC_UART_SUPPORT_APB_CLK
102+
UART_CLK_SRC_APB = UART_SCLK_APB,
103+
#endif
104+
#if SOC_UART_SUPPORT_PLL_F40M_CLK
105+
UART_CLK_SRC_PLL = UART_SCLK_PLL_F40M,
106+
#elif SOC_UART_SUPPORT_PLL_F80M_CLK
107+
UART_CLK_SRC_PLL = UART_SCLK_PLL_F80M,
108+
#elif CONFIG_IDF_TARGET_ESP32H2
109+
UART_CLK_SRC_PLL = UART_SCLK_PLL_F48M,
110+
#endif
111+
#if SOC_UART_SUPPORT_XTAL_CLK
112+
UART_CLK_SRC_XTAL = UART_SCLK_XTAL,
113+
#endif
114+
#if SOC_UART_SUPPORT_RTC_CLK
115+
UART_CLK_SRC_RTC = UART_SCLK_RTC,
116+
#endif
117+
#if SOC_UART_SUPPORT_REF_TICK
118+
UART_CLK_SRC_REF_TICK = UART_SCLK_REF_TICK,
119+
#endif
120+
} SerialClkSrc;
121+
99122
#ifndef ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE
100123
#ifndef CONFIG_ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE
101124
#define ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE 2048
@@ -352,6 +375,17 @@ class HardwareSerial : public Stream {
352375
// UART_MODE_RS485_COLLISION_DETECT = 0x03 mode: RS485 collision detection UART mode (used for test purposes)
353376
// UART_MODE_RS485_APP_CTRL = 0x04 mode: application control RS485 UART mode (used for test purposes)
354377
bool setMode(SerialMode mode);
378+
// Used to set the UART clock source mode. It must be set before calling begin(), otherwise it won't have any effect.
379+
// Not all clock source are available to every SoC. The compatible option are listed here:
380+
// UART_CLK_SRC_DEFAULT :: any SoC - it will set whatever IDF defines as the default UART Clock Source
381+
// UART_CLK_SRC_APB :: ESP32, ESP32-S2, ESP32-C3 and ESP32-S3
382+
// UART_CLK_SRC_PLL :: ESP32-C2, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2 and ESP32-P4
383+
// UART_CLK_SRC_XTAL :: ESP32-C2, ESP32-C3, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2, ESP32-S3 and ESP32-P4
384+
// UART_CLK_SRC_RTC :: ESP32-C2, ESP32-C3, ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2, ESP32-S3 and ESP32-P4
385+
// UART_CLK_SRC_REF_TICK :: ESP32 and ESP32-S2
386+
// Note: CLK_SRC_PLL Freq depends on the SoC - ESP32-C2 has 40MHz, ESP32-H2 has 48MHz and ESP32-C5, C6, C61 and P4 has 80MHz
387+
// Note: ESP32-C6, C61, ESP32-P4 and ESP32-C5 have LP UART that will use only RTC_FAST or XTAL/2 as Clock Source
388+
bool setClockSource(SerialClkSrc clkSrc);
355389
size_t setRxBufferSize(size_t new_size);
356390
size_t setTxBufferSize(size_t new_size);
357391

‎cores/esp32/USB.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -100,13 +100,15 @@ static bool tinyusb_device_suspended = false;
100100
void tud_mount_cb(void) {
101101
tinyusb_device_mounted = true;
102102
arduino_usb_event_data_t p;
103+
p.suspend.remote_wakeup_en = 0;
103104
arduino_usb_event_post(ARDUINO_USB_EVENTS, ARDUINO_USB_STARTED_EVENT, &p, sizeof(arduino_usb_event_data_t), portMAX_DELAY);
104105
}
105106

106107
// Invoked when device is unmounted
107108
void tud_umount_cb(void) {
108109
tinyusb_device_mounted = false;
109110
arduino_usb_event_data_t p;
111+
p.suspend.remote_wakeup_en = 0;
110112
arduino_usb_event_post(ARDUINO_USB_EVENTS, ARDUINO_USB_STOPPED_EVENT, &p, sizeof(arduino_usb_event_data_t), portMAX_DELAY);
111113
}
112114

@@ -123,6 +125,7 @@ void tud_suspend_cb(bool remote_wakeup_en) {
123125
void tud_resume_cb(void) {
124126
tinyusb_device_suspended = false;
125127
arduino_usb_event_data_t p;
128+
p.suspend.remote_wakeup_en = 0;
126129
arduino_usb_event_post(ARDUINO_USB_EVENTS, ARDUINO_USB_RESUME_EVENT, &p, sizeof(arduino_usb_event_data_t), portMAX_DELAY);
127130
}
128131

‎cores/esp32/USBCDC.cpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -455,6 +455,7 @@ void USBCDC::setDebugOutput(bool en) {
455455
} else {
456456
ets_install_putc2(NULL);
457457
}
458+
ets_install_putc1(NULL); // closes UART log output
458459
}
459460

460461
USBCDC::operator bool() const {

‎cores/esp32/esp32-hal-bt.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@
1515
#include "esp32-hal-bt.h"
1616

1717
#if SOC_BT_SUPPORTED
18-
#ifdef CONFIG_BT_ENABLED
18+
#ifdef CONFIG_BT_BLUEDROID_ENABLED
1919

2020
#if CONFIG_IDF_TARGET_ESP32
2121
bool btInUse() {

‎cores/esp32/esp32-hal-misc.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -25,9 +25,9 @@
2525
#include "esp_ota_ops.h"
2626
#endif //CONFIG_APP_ROLLBACK_ENABLE
2727
#include "esp_private/startup_internal.h"
28-
#if defined(CONFIG_BT_ENABLED) && SOC_BT_SUPPORTED
28+
#if defined(CONFIG_BT_BLUEDROID_ENABLED) && SOC_BT_SUPPORTED
2929
#include "esp_bt.h"
30-
#endif //CONFIG_BT_ENABLED
30+
#endif //CONFIG_BT_BLUEDROID_ENABLED
3131
#include <sys/time.h>
3232
#include "soc/rtc.h"
3333
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) && !defined(CONFIG_IDF_TARGET_ESP32C5)
@@ -245,7 +245,7 @@ bool verifyRollbackLater() {
245245
}
246246
#endif
247247

248-
#ifdef CONFIG_BT_ENABLED
248+
#ifdef CONFIG_BT_BLUEDROID_ENABLED
249249
#if CONFIG_IDF_TARGET_ESP32
250250
//overwritten in esp32-hal-bt.c
251251
bool btInUse() __attribute__((weak));
@@ -307,7 +307,7 @@ void initArduino() {
307307
if (err) {
308308
log_e("Failed to initialize NVS! Error: %u", err);
309309
}
310-
#if defined(CONFIG_BT_ENABLED) && SOC_BT_SUPPORTED
310+
#if defined(CONFIG_BT_BLUEDROID_ENABLED) && SOC_BT_SUPPORTED
311311
if (!btInUse()) {
312312
esp_bt_controller_mem_release(ESP_BT_MODE_BTDM);
313313
}

‎cores/esp32/esp32-hal-rmt.c‎

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -206,7 +206,8 @@ bool rmtSetCarrier(int pin, bool carrier_en, bool carrier_level, uint32_t freque
206206
log_w("GPIO %d - RMT Carrier must be a float percentage from 0 to 1. Setting to 50%.", pin);
207207
duty_percent = 0.5;
208208
}
209-
rmt_carrier_config_t carrier_cfg = {0};
209+
rmt_carrier_config_t carrier_cfg;
210+
memset((void *)&carrier_cfg, 0, sizeof(rmt_carrier_config_t));
210211
carrier_cfg.duty_cycle = duty_percent; // duty cycle
211212
carrier_cfg.frequency_hz = carrier_en ? frequency_Hz : 0; // carrier frequency in Hz
212213
carrier_cfg.flags.polarity_active_low = carrier_level; // carrier modulation polarity level
@@ -313,7 +314,8 @@ static bool _rmtWrite(int pin, rmt_data_t *data, size_t num_rmt_symbols, bool bl
313314
return false;
314315
}
315316

316-
rmt_transmit_config_t transmit_cfg = {0}; // loop mode disabled
317+
rmt_transmit_config_t transmit_cfg; // loop mode disabled
318+
memset((void *)&transmit_cfg, 0, sizeof(rmt_transmit_config_t));
317319
bool retCode = true;
318320

319321
RMT_MUTEX_LOCK(bus);
@@ -380,6 +382,7 @@ static bool _rmtRead(int pin, rmt_data_t *data, size_t *num_rmt_symbols, bool wa
380382

381383
// request reading RMT Channel Data
382384
rmt_receive_config_t receive_config;
385+
memset((void *)&receive_config, 0, sizeof(rmt_receive_config_t));
383386
receive_config.signal_range_min_ns = bus->signal_range_min_ns;
384387
receive_config.signal_range_max_ns = bus->signal_range_max_ns;
385388

@@ -530,6 +533,7 @@ bool rmtInit(int pin, rmt_ch_dir_t channel_direction, rmt_reserve_memsize_t mem_
530533
if (channel_direction == RMT_TX_MODE) {
531534
// TX Channel
532535
rmt_tx_channel_config_t tx_cfg;
536+
memset((void *)&tx_cfg, 0, sizeof(rmt_tx_channel_config_t));
533537
tx_cfg.gpio_num = pin;
534538
// CLK_APB for ESP32|S2|S3|C3 -- CLK_PLL_F80M for C6 -- CLK_XTAL for H2
535539
tx_cfg.clk_src = RMT_CLK_SRC_DEFAULT;
@@ -559,6 +563,7 @@ bool rmtInit(int pin, rmt_ch_dir_t channel_direction, rmt_reserve_memsize_t mem_
559563
} else {
560564
// RX Channel
561565
rmt_rx_channel_config_t rx_cfg;
566+
memset((void *)&rx_cfg, 0, sizeof(rmt_rx_channel_config_t));
562567
rx_cfg.gpio_num = pin;
563568
// CLK_APB for ESP32|S2|S3|C3 -- CLK_PLL_F80M for C6 -- CLK_XTAL for H2
564569
rx_cfg.clk_src = RMT_CLK_SRC_DEFAULT;
@@ -585,7 +590,8 @@ bool rmtInit(int pin, rmt_ch_dir_t channel_direction, rmt_reserve_memsize_t mem_
585590
}
586591

587592
// allocate memory for the RMT Copy encoder
588-
rmt_copy_encoder_config_t copy_encoder_config = {};
593+
rmt_copy_encoder_config_t copy_encoder_config;
594+
memset((void *)&copy_encoder_config, 0, sizeof(rmt_copy_encoder_config_t));
589595
if (rmt_new_copy_encoder(&copy_encoder_config, &bus->rmt_copy_encoder_h) != ESP_OK) {
590596
log_e("GPIO %d - RMT Encoder Memory Allocation error.", pin);
591597
goto Err;

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