[libjava patch] Add sh64-* support

Fri Jun 13 10:04:00 GMT 2003

Hi,
The appended patch adds a minimal sh64-* suport to libgcj.
Unfortunately, it seems that Dwarf EH doesn't work well yet for this
port and sjlj has the same problem with SH-4 case
<URL:http://gcc.gnu.org/bugzilla/show_bug.cgi?id=7620>.
With sjlj configuration and a few workarounds, I got the following
test result on sh64-unknown-linux-gnu. I used cross build and remote
execution setting, so some tests were skipped.
		=== libjava tests ===
Schedule of variations:
 unix
Running target unix
Using /usr/share/dejagnu/baseboards/unix.exp as board description file for target.
Using /usr/share/dejagnu/config/unix.exp as generic interface file for target.
Using /ext3/suzaku/home/kkojima/LOCAL/gcc/libjava/testsuite/config/default.exp as tool-and-target-specific interface file.
WARNING: Assuming target board is the local machine (which is probably wrong).
You may need to set your DEJAGNU environment variable.
Running /ext3/suzaku/home/kkojima/LOCAL/gcc/libjava/testsuite/libjava.cni/cni.exp ...
Running /ext3/suzaku/home/kkojima/LOCAL/gcc/libjava/testsuite/libjava.compile/compile.exp ...
Running /ext3/suzaku/home/kkojima/LOCAL/gcc/libjava/testsuite/libjava.jacks/jacks.exp ...
Running /ext3/suzaku/home/kkojima/LOCAL/gcc/libjava/testsuite/libjava.jni/jni.exp ...
Running /ext3/suzaku/home/kkojima/LOCAL/gcc/libjava/testsuite/libjava.lang/lang.exp ...
FAIL: Divide_1 execution - source compiled test
FAIL: Divide_1 output - gij test
FAIL: Divide_1 execution - bytecode->native test
FAIL: Divide_1 -O execution - source compiled test
FAIL: Divide_1 output - gij test
FAIL: Divide_1 -O execution - bytecode->native test
FAIL: negzero execution - gij test
FAIL: negzero execution - gij test
FAIL: pr6388 output - gij test
FAIL: pr6388 output - gij test
Running /ext3/suzaku/home/kkojima/LOCAL/gcc/libjava/testsuite/libjava.loader/loader.exp ...
Running /ext3/suzaku/home/kkojima/LOCAL/gcc/libjava/testsuite/libjava.mauve/mauve.exp ...
		=== libjava Summary ===
# of expected passes 2844
# of unexpected failures 10
# of expected failures 16
# of untested testcases 138
It looks like not so bad as a stating point. OK for the mainline?
Regards,
	kaz
--
2003年06月13日 Kaz Kojima <kkojima@rr.iij4u.or.jp>
	* configure.host : Add sh64-* and sh5*-* support.
	* sysdep/sh64/locks.h : New file.
diff -u3prN ORIG/gcc/libjava/configure.host LOCAL/gcc/libjava/configure.host

--- ORIG/gcc/libjava/configure.host	Sun May 11 12:32:33 2003
+++ LOCAL/gcc/libjava/configure.host	Wed Jun 11 13:27:18 2003
@@ -148,6 +148,14 @@ case "${host}" in
 	libgcj_interpreter=yes
 	enable_hash_synchronization_default=yes
 	;;
+ sh64-* | sh5*-*)
+	sysdeps_dir=sh64
+	libgcj_flags="${libgcj_flags} -mieee"
+	libgcj_interpreter=yes
+	CHECKREFSPEC=-fcheck-references
+	DIVIDESPEC=-fuse-divide-subroutine
+	EXCEPTIONSPEC=
+	;;
 esac
 
 # This case statement supports generic port properties and may refine
diff -u3prN ORIG/gcc/libjava/sysdep/sh64/locks.h LOCAL/gcc/libjava/sysdep/sh64/locks.h
--- ORIG/gcc/libjava/sysdep/sh64/locks.h	Thu Jan 1 09:00:00 1970
+++ LOCAL/gcc/libjava/sysdep/sh64/locks.h	Wed Jun 11 13:27:18 2003
@@ -0,0 +1,72 @@
+// locks.h - Thread synchronization primitives. SuperH SHmedia implementation.
+
+/* Copyright (C) 2003 Free Software Foundation
+
+ This file is part of libgcj.
+
+This software is copyrighted work licensed under the terms of the
+Libgcj License. Please consult the file "LIBGCJ_LICENSE" for
+details. */
+
+#ifndef __SYSDEP_LOCKS_H__
+#define __SYSDEP_LOCKS_H__
+
+typedef size_t obj_addr_t;	/* Integer type big enough for object	*/
+				/* address.				*/
+
+static long long __cas_lock = 0;
+
+inline static void
+__cas_start_atomic (void)
+{
+ long long val;
+
+ do
+ __asm__ __volatile__ ("swap.q %1,0,%0"
+			 : "=&r" (val)
+			 : "r" (&__cas_lock) "0" (1LL)
+			 : "memory");
+ while (val == 1);
+}
+
+inline static void
+__cas_end_atomic (void)
+{
+ __asm__ __volatile__ (" " : : : "memory");
+ __cas_lock = 0;
+}
+
+inline static bool
+compare_and_swap (volatile obj_addr_t *addr, obj_addr_t old,
+		 obj_addr_t new_val)
+{
+ bool ret;
+
+ __cas_start_atomic ();
+ if (*addr != old)
+ ret = false;
+ else
+ {
+ *addr = new_val;
+ ret = true;
+ }
+ __cas_end_atomic ();
+
+ return ret;
+}
+
+inline static void
+release_set (volatile obj_addr_t *addr, obj_addr_t new_val)
+{
+ __asm__ __volatile__ (" " : : : "memory");
+ *(addr) = new_val;
+}
+
+inline static bool
+compare_and_swap_release (volatile obj_addr_t *addr, obj_addr_t old,
+			 obj_addr_t new_val)
+{
+ return compare_and_swap (addr, old, new_val);
+}
+
+#endif /* ! __SYSDEP_LOCKS_H__ */
