status of gcj's boehm collector?
Bryce McKinlay
bryce@waitaki.otago.ac.nz
Wed Dec 5 01:10:00 GMT 2001
Boehm, Hans wrote:
>Prefetch:
>>I believe the AMD version of the prefetch instruction faults on a PII+. The
>PIII version appears to be a no-op on a PII. I haven't tried the other
>possible combinations. Ideally we should compile in all 3 versions of the
>marker (it's not that much code), and choose dynamically. (The AMD version
>doesn't seem to help much on a K6-2. It may make more of a difference on an
>Athlon.)
>
Incedentally GCC recently got (or is about to get?) a
__builtin_prefetch() which will support the AMD, P3, and IA64 prefetch
instructions, and maybe others. Obviously we'd still need to compile
different variants for the different x86 family chips, but it might just
be a case of compiling it multiple times with different -march options.
regards
Bryce.
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