Code to add two 4bit numbers in verilog doesn't work

Question

I have a code that adds two 4 bit numbers; unfortunately it is not working for every case even though the formulas are really simple and I don't find the problem...

module part2(SW, LEDG, LEDR);
 input [17:0] SW;
 output [17:0] LEDR;
 output [4:0] LEDG;
 //Red lights for each one
 assign LEDR[17:0] = SW[17:0];
 //Wires between adders.
 wire carry[2:0];
 //Add the first digits of A and B
 full_adder F0(SW[4], SW[0], SW[8], LEDG[0], carry[0]);
 //Add the second digits of A and B
 full_adder F1(SW[3], SW[1], carry[0], LEDG[1], carry[1]);
 //Add the third digits of A and B
 full_adder F2(SW[6], SW[2], carry[1], LEDG[2], carry[2]);
 //Add the last digits of A and B
 full_adder F3(SW[7], SW[3], carry[2], LEDG[3], LEDG[4]);
 endmodule
module full_adder(A, B, CI, S, CO);
 input A, B, CI;
 output S, CO;
 //Sum
 assign S = A ^ B ^ CI;
 //Carry out
 assign CO = (A & B) | (CI & A) | (CI & B);
endmodule

It seems to work for most cases but look what happens with 1 and 10:

enter image description here

Answer 1

Typo in your code:

full_adder F1(SW[3], SW[1], carry[0], LEDG[1], carry[1]);

should instead be

full_adder F1(SW[5], SW[1], carry[0], LEDG[1], carry[1]);

Answer 2

Just add your two 4-bit numbers together and let Verilog deal with the specifics.

assign LEDG = {1'b0,SW[7:4]} + {1'b0,SW[3:0]};

I've mapped the 4-bit inputs in the calculation to 5 bits to ensure that the synthesizer deals with the carry.