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Author pitrou
Recipients pitrou, rhettinger, serhiy.storchaka, tim.peters
Date 2015年01月18日.01:26:39
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Message-id <1421544400.39.0.987145107178.issue23259@psf.upfronthosting.co.za>
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Fewer instructions doesn't necessarily translate into better performance. The bottleneck in superscalar, pipelined processors is often the data dependency path between instructions. Adding instructions may as well not slow anything down, if those instructions don't lengthen the dependency path.
It would be interesting to know what the impact of the patch is on the workloads that were supposed to be helped by the removed logic.
History
Date User Action Args
2015年01月18日 01:26:40pitrousetrecipients: + pitrou, tim.peters, rhettinger, serhiy.storchaka
2015年01月18日 01:26:40pitrousetmessageid: <1421544400.39.0.987145107178.issue23259@psf.upfronthosting.co.za>
2015年01月18日 01:26:40pitroulinkissue23259 messages
2015年01月18日 01:26:39pitroucreate

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