Message196202
| Author |
pitrou |
| Recipients |
pitrou, rhettinger, tim.peters, vstinner |
| Date |
2013年08月26日.12:18:45 |
| SpamBayes Score |
-1.0 |
| Marked as misclassified |
Yes |
| Message-id |
<1642047011.13842298.1377519519801.JavaMail.root@zimbra10-e2.priv.proxad.net> |
| In-reply-to |
<1377514366.21.0.00190556268388.issue18835@psf.upfronthosting.co.za> |
| Content |
> What is the alignment of a cacheline? Can a line starts at any
> address?
If it could, Raymond wouldn't be asking for this feature ;-)
Cachelines are typically aligned at whatever their size is. So,
a 64-byte cacheline will be aligned at a 64 bytes boundary.
Perhaps some CPUs operate differently, but mainstream CPUs are
generally like that (for good reason: a cache is much simpler
to implement if there can't be some overlapping between cache
lines).
> Do you have an idea of performance benefit of memory alignment?
>
> Adding yet another API to allocate memory has a cost.
Agreed. Aligned memory allocation is useful if your
*algorithms* benefit from alignment (e.g. some SIMD-optimized
code, or something relying on page tables). But aligning
every data structure on a cacheline boundary doesn't sound
like a very good idea: if it was, the system allocator
would do it for you, IMHO ;-) |
|