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Are you certain about that? In the datasheet it says The External Interrupts 7 - 4 are activated by the external pins INT7:4 if the SREG I-flag and the corresponding interrupt mask in the EIMSK is set. My reading of that was that the flag is set if the interrupt is enabled. Otherwise, how would it know if it is rising or falling?Nick Gammon– Nick Gammon ♦07/02/2023 10:29:38Commented Jul 2, 2023 at 10:29
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I might be wrong about that, I admit.Nick Gammon– Nick Gammon ♦07/02/2023 10:31:09Commented Jul 2, 2023 at 10:31
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@NickGammon: In edge-detection mode, the flag is set even if the interrupt is disabled (I just checked). However, this is a bad example, as the interrupt flag does not work in level-detection mode: "These flags are always cleared when INT7:0 are configured as level interrupt." I changed the example in my answer.Edgar Bonet– Edgar Bonet07/02/2023 12:34:16Commented Jul 2, 2023 at 12:34
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2I left a comment above, too, but the actual process period is ~200µs (repeated many times) while exposing an image to a camera sensor. And it's less sensitive to any particular clock rate. I just want each identical busy-wait to take the same wall-clock time so there isn't any brightness difference between each exposure. Even that 2.6µs gives around 1.3% additional illumination. On a 12-bit sensor, that starts to add up quickly. The UART intentionally isn't sending or receiving during that period, so hopefully it's alright to just leave it enabled...Nicholas– Nicholas07/02/2023 23:43:12Commented Jul 2, 2023 at 23:43
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It seems to me that the question of whether the flag is set or not might be somewhat implementation-specific. Even if it is 100% guaranteed for AVR chips it might not be for others, hence relying on that behaviour is not very good practice.Mark Morgan Lloyd– Mark Morgan Lloyd07/03/2023 06:49:57Commented Jul 3, 2023 at 6:49