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uint32_t liste[] PROGMEM = { 0x8F66F1, 0x0, 0xAAAAAB }; //Données à envoyer

#define DMA_BUF_SIZE (sizeof(liste) / sizeof(liste[0])) //Taille mémoire DMA
uint32_t i;
void setup() {
 uint clk_div = 0x90; //Diviseur d'horloge souhaité
 clk_div = (clk_div / 24) / DMA_BUF_SIZE;
 clk_div = floor(clk_div + 0.5);
 clk_div = clk_div * 24 * DMA_BUF_SIZE; //Diviseur d'Horloge ajusté -> MCK/2*clk_div
 PMC->PMC_WPMR = 0x504D4300; //Désactivation protection PMC
 PMC->PMC_PCER0 = (1 << ID_SSC); //Activation horloge pour SSC
 PMC->PMC_SCER |= 0x100; //Activation horloge
 PIOA->PIO_WPMR = 0x50494F00; //Désactivation protection Port I/O A
 PIOA->PIO_PDR = PIO_PDR_P14 | PIO_PDR_P15 | PIO_PDR_P16; //I/O contrôlée par le périphérique
 PIOA->PIO_ABSR |= PIO_PA14B_TK | PIO_PA15B_TF | PIO_PA16B_TD; //Assignation des I/O à SSC
 SSC->SSC_CR = SSC_CR_RXDIS | SSC_CR_TXDIS | SSC_CR_SWRST; //Désactivation et réinitialisation SSC
 SSC->SSC_WPMR = 0x53534300; //Désactivation protection SSC
 SSC->SSC_IDR = 0xFFFFFFFF; //Désactivation Interrupteurs
 SSC->SSC_IER = 0x00000000; //Désactivation Interrupteurs bis
 SSC->SSC_CMR = clk_div; //Gestion de l'horloge
 SSC->SSC_TFMR = SSC_TFMR_DATLEN(0x18) | SSC_TFMR_MSBF | SSC_TFMR_DATNB(0); //Gestion transfert des données
 SSC->SSC_TCMR = SSC_TCMR_CKS_MCK | SSC_TCMR_CKO_CONTINUOUS | SSC_TCMR_START_CONTINUOUS | SSC_TCMR_STTDLY(0); //Gestion de l'horloge lors de transferts
 SSC->SSC_CR = SSC_CR_TXEN; //Activation transmission SSC
}
void loop() {
 for (i = 0; i < DMA_BUF_SIZE; i++) {
 ssc_write((Ssc*)SSC, (uint32_t)liste[i]); //Transmission SSC
 }
}

uint32_t liste[] PROGMEM = { 0x8F66F1, 0x0, 0xAAAAAB }; //Data to send
#define DMA_BUF_SIZE (sizeof(liste) / sizeof(liste[0])) //Size DMA buffer
uint32_t i;
void setup() {
 uint clk_div = 0x90; //Clock divider wanted
 clk_div = (clk_div / 24) / DMA_BUF_SIZE;
 clk_div = floor(clk_div + 0.5);
 clk_div = clk_div * 24 * DMA_BUF_SIZE; //Clock divider adjusted -> MCK/2*clk_div
 PMC->PMC_WPMR = 0x504D4300; //Desactivation protection PMC
 PMC->PMC_PCER0 = (1 << ID_SSC); //Activation SSC clock
 PMC->PMC_SCER |= 0x100; //Activation clock
 PIOA->PIO_WPMR = 0x50494F00; //Desactivation protection Port I/O A
 PIOA->PIO_PDR = PIO_PDR_P14 | PIO_PDR_P15 | PIO_PDR_P16; //I/O controlled by the peripheral
 PIOA->PIO_ABSR |= PIO_PA14B_TK | PIO_PA15B_TF | PIO_PA16B_TD; //Assignation of I/O to SSC
 SSC->SSC_CR = SSC_CR_RXDIS | SSC_CR_TXDIS | SSC_CR_SWRST; //Desactivation and reset SSC
 SSC->SSC_WPMR = 0x53534300; //Desactivation protection SSC
 SSC->SSC_IDR = 0xFFFFFFFF; //Desactivation Interrupts
 SSC->SSC_IER = 0x00000000; //Desactivation Interrupts bis
 SSC->SSC_CMR = clk_div; //Clock management
 SSC->SSC_TFMR = SSC_TFMR_DATLEN(0x18) | SSC_TFMR_MSBF | SSC_TFMR_DATNB(0); //Data transfert management
 SSC->SSC_TCMR = SSC_TCMR_CKS_MCK | SSC_TCMR_CKO_CONTINUOUS | SSC_TCMR_START_CONTINUOUS | SSC_TCMR_STTDLY(0); //Clock during transfert management
 SSC->SSC_CR = SSC_CR_TXEN; //Activation transmission SSC
}
void loop() {
 for (i = 0; i < DMA_BUF_SIZE; i++) {
 ssc_write((Ssc*)SSC, (uint32_t)liste[i]); //Transmission SSC
 }
}