You are not logged in. Your edit will be placed in a queue until it is peer reviewed.
We welcome edits that make the post easier to understand and more valuable for readers. Because community members review edits, please try to make the post substantially better than how you found it, for example, by fixing grammar or adding additional resources and hyperlinks.
Required fields*
-
You wrote: "I believe in phase correct mode the timer overflows every 510 counts, not 512 as indicated by Edgar". Please, read my answer again, and do not misquote me.Edgar Bonet– Edgar Bonet10/12/2016 14:27:12Commented Oct 12, 2016 at 14:27
-
Sorry, I was refering to this line "#define MICROSECONDS_PER_TIMER0_OVERFLOW (clockCyclesToMicroseconds(1 * 512))" - I have updated my comment, correct me if I am wrong here, I didn't intend to misquoteNerbsie– Nerbsie10/13/2016 12:13:14Commented Oct 13, 2016 at 12:13
-
There is a very good reason for having 512 instead of 510 in this line. Read my answer and you will understand.Edgar Bonet– Edgar Bonet10/13/2016 12:28:25Commented Oct 13, 2016 at 12:28
-
Okay, so you are adding two timer counts, each being 62.5ns, to account for the error caused by the forced round-down?Nerbsie– Nerbsie10/13/2016 12:38:42Commented Oct 13, 2016 at 12:38
-
1Edgar, if you would like to continue helping me I decided that instead of answering a question with questions of my own and potential misinformation I would ask a questionNerbsie– Nerbsie10/13/2016 14:48:24Commented Oct 13, 2016 at 14:48