On 03/07/2009 08:57, "Kouya Shimura" <kouya@xxxxxxxxxxxxxx> wrote:
> - I'm afraid that d->arch.hvm_domain.i8259_target == NULL
If VCPUj is != NULL then VCPUi is also != NULL for all i < j. So this is not
a concern: there's always a VCPU0 if there are any VCPUs at all.
> - if vcpu[0] is halted and all vlapic.LVT0 are masked,
> timer doesn't work even when vlapic will be unmasked
> not as ExtINT mode.
Not sure what you mean? If legacy IRQs are routed through the IOAPIC then it
does not matter whether LAPIC.LVT0 is masked. And __vlapic_accept_pic_intr()
correctly handles that. If virtual wire mode is not through the IOAPIC then
of course LVT0 mask does matter, but I think we have that case correct too.
> So, I think that the last __vlapic_accept_pic_intr'ed vcpu
> should be reserved in d->arch.hvm_domain.i8259_target.
I don't think the logic needs to change.
 -- Keir
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