Keir (and anyone else with an opinion on this :),
Given that you have suggested that patching from the hypervisor might
have synchronisation issues, my current thought on a mechanism for
signalling a DomU when a TPR write occurs is this:
. DomU allocates a page and makes a hypercall to the hypervisor saying
"put info about TPR writes here" and use this event channel to signal
me.
. When a TPR write occurs, the hypervisor fills in the entry in the
buffer nominated above and sets a flag. Until the flag is cleared, the
hypervisor does no further signalling.
. The guest sees the event (via the interrupt - same as any other
event), patches the kernel as appropriate, then clears the flag
. Repeat until all the places are patched.
Obviously a number of iterations will be required before all the
patching is done, but I don't think that's a problem. Patching would
occur in the DomU with all processors at HIGH_LEVEL (interrupts
disabled).
Does that sound acceptable?
Thanks
James
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