WARNING - OLD ARCHIVES

Isaku Yamahata <yamahata@xxxxxxxxxxxxx> · Thu, 9 Oct 2008 11:58:42 +0900

I forgot to attach the file. Now attached.
I cut off it so that it includes only \_PR becuase it's long.
If you need the full of it, please tell me.
DefinitionBlock ("DSDT.aml", "DSDT", 1, "Intel", "SR870BN4", 0x00000000)
{
 Name (PMBS, 0x0C00)
 Name (PMLN, 0x08)
 Name (IOB1, 0x00)
 Name (IOL1, 0x00)
 Name (APCB, 0xFEC00000)
 Name (APCL, 0x00010000)
 Name (PUID, 0x00)
 Name (NPSS, 0x01)
 Scope (\_PR)
 {
 Processor (CPU0, 0x00, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x0000063B, 
 0x0001ADB0, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000064
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPU1, 0x08, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x0000063B, 
 0x0001ADB0, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000064
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPU2, 0x04, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x0000063B, 
 0x0001ADB0, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000064
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPU3, 0x0C, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x0000063B, 
 0x0001ADB0, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000064
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPU4, 0x01, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x0000063B, 
 0x0001ADB0, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000064
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPU5, 0x09, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x0000063B, 
 0x0001ADB0, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000064
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPU6, 0x05, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x0000063B, 
 0x0001ADB0, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000064
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPU7, 0x0D, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x0000063B, 
 0x0001ADB0, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000064
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }, 
 Package (0x06)
 {
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000, 
 0x00000000
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPU8, 0x02, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPU9, 0x0A, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPUA, 0x06, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPUB, 0x0E, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPUC, 0x03, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPUD, 0x0B, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPUE, 0x07, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 Processor (CPUF, 0x0F, 0x00000000, 0x00)
 {
 Name (_PCT, Package (0x02)
 {
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }, 
 ResourceTemplate ()
 {
 Register (FFixedHW, 
 0x00, // Bit Width
 0x00, // Bit Offset
 0x0000000000000000, // Address
 ,)
 }
 })
 Name (_PSS, Package (0x03)
 {
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }, 
 Package (0x06)
 {
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF, 
 0x000FFFFF
 }
 })
 Method (_PPC, 0, NotSerialized)
 {
 Return (0x00)
 }
 }
 }
...
On Thu, Oct 09, 2008 at 11:54:56AM +0900, Isaku Yamahata wrote:
> On Thu, Oct 09, 2008 at 10:34:00AM +0800, Yu, Ke wrote:
> > Hi Isaku,
> > 
> > Thanks for tesing. Please see my comments below.
> > 
> > Isaku Yamahata wrote:
> > > Hi Yu. I tested it and have some comments.
> > >
> > > - When I run xenpm, xen panics
> > > It panics at 0xf40000000406ba91 =
> > > xen-unstable.hg/xen/drivers/acpi/pmstat.c:98 (addr2line told)
> > > It looks like pxpt->u.pt[pxpt->u.cur] wasn't allocated yet resulting
> > > in NULL pointer reference.
> > 
> > As Guanquan replied, this is a separate issue of xenpm logic, he will post 
> > another patch to fix this issue.
>
> Great.
>
>
> > > - From the boot message, ondemand governor fails to load.
> > > I'm not sure this error is expected because of my hardware.
> > > I guess this error case haven't been tested and that it caused
> > > the above panic.
> > 
> > >From the boot message, the BIOS _PSS information is totally messed up. 
> > >E.g. 1048575us latency is wrong which cause ondemand driver fail to load, 
> > >also 1048575MHz freq is obviously not correct. There are several possible 
> > >reasons of this:
> > - BIOS itself is not correct
> > - Dom0 ACPICA parsing logic is not correct.
> > 
> > If the native linux (e.g RHEL5) works, then I tend to believe this is dut 
> > to the second reason. The dom0 kernel is bit old and bunch of ACPICA fixes 
> > in mainline kernel are not included in dom0. In my case, I also find the 
> > _PSS parsing result in my Hitachi itanium 2 box is not correct. This issue 
> > is fixed after I pulling two patch from mainline kernel (changeset 677 and 
> > 678 in http://xenbits.xensource.com/linux-2.6.18-xen.hg)
> > 
> > Anyway, this is a separate issue. we will try to find other ia64 box to see 
> > if this issue can be reproduced and then fixed.
> > 
> > BTW, is it possible to check in these patch first?
>
> Yes, I'll try them.
>
> I attached DSDT.dsl which I extracted from my tiger4.
> It seems that wrong acpi cpuid is used.
> acpi cpu id which was passed should be one of
> 0x00,0x01,0x04,0x05,0x08,0x09,0x0C,0x0D.
> But unintended value is used.
-- 
yamahata
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To:	"Yu, Ke" <ke.yu@xxxxxxxxx>
Subject:	Re: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support
From:	Isaku Yamahata <yamahata@xxxxxxxxxxxxx>
Date:	Thu, 9 Oct 2008 11:58:42 +0900
Cc:	"Lu, Guanqun" <guanqun.lu@xxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>, "xen-ia64-devel@xxxxxxxxxxxxxxxxxxx" <xen-ia64-devel@xxxxxxxxxxxxxxxxxxx>
Delivery-date:	2008年10月08日 19:59:11 -0700
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Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Isaku Yamahata RE: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Yu, Ke Re: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Isaku Yamahata RE: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Lu, Guanqun RE: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Yu, Ke Re: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Isaku Yamahata Re: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support, Isaku Yamahata <= RE: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Yu, Ke Re: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Isaku Yamahata RE: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Yu, Ke Re: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Isaku Yamahata Re: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq support , Isaku Yamahata

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xen-devel

Re: [Xen-devel] Re: [Xen-ia64-devel] [PATCH 0/3] IA64: add cpufreq suppo