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[Xen-devel] [PATCH 3/9] dom0 PCI: support ARI capability

To: "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: [Xen-devel] [PATCH 3/9] dom0 PCI: support ARI capability
From: "Zhao, Yu" <yu.zhao@xxxxxxxxx>
Date: 2008年9月27日 16:59:10 +0800
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Cc: Keir Fraser <keir.fraser@xxxxxxxxxxxxx>
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Thread-index: Ackgf05SCHEyze/UQcOzu5ws9csRIA==
Thread-topic: [PATCH 3/9] dom0 PCI: support ARI capability
Add Alternative Routing-ID Interpretation (ARI) support.
Signed-off-by: Yu Zhao <yu.zhao@xxxxxxxxx>
diff -r 5020cef2bc39 -r 040046b91eb7 drivers/pci/pci.c
--- a/drivers/pci/pci.c Sat Sep 27 01:25:05 2008 -0400
+++ b/drivers/pci/pci.c Sat Sep 27 01:25:31 2008 -0400
@@ -954,6 +954,33 @@
 return 0;
 }
+/**
+ * pci_ari_init - turn on ARI forwarding if it's supported
+ * @dev: the PCI device
+ */
+void pci_ari_init(struct pci_dev *dev)
+{
+ int pos;
+ u32 cap;
+ u16 ctrl;
+
+ pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+ if (!pos)
+ return;
+
+ pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap);
+
+ if (!(cap & PCI_EXP_DEVCAP2_ARI))
+ return;
+
+ pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
+ ctrl |= PCI_EXP_DEVCTL2_ARI;
+ pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+
+ dev->ari_enabled = 1;
+ dev_info(&dev->dev, "ARI forwarding enabled.\n");
+}
+
 static int __devinit pci_init(void)
 {
 struct pci_dev *dev = NULL;
diff -r 5020cef2bc39 -r 040046b91eb7 drivers/pci/pci.h
--- a/drivers/pci/pci.h Sat Sep 27 01:25:05 2008 -0400
+++ b/drivers/pci/pci.h Sat Sep 27 01:25:31 2008 -0400
@@ -120,5 +120,17 @@
 extern int pci_resource_alignment(struct pci_dev *dev, int resno);
 extern int pci_resource_bar(struct pci_dev *dev, int resno,
 enum pci_bar_type *type);
+extern void pci_ari_init(struct pci_dev *dev);
+/**
+ * pci_ari_fwd_enabled - query ARI forwarding status
+ * @dev: the PCI device
+ *
+ * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
+ * returns negative on failure.
+ */
+static inline int pci_ari_enabled(struct pci_dev *dev)
+{
+ return dev->ari_enabled;
+}
 #endif /* DRIVERS_PCI_H */
diff -r 5020cef2bc39 -r 040046b91eb7 drivers/pci/probe.c
--- a/drivers/pci/probe.c Sat Sep 27 01:25:05 2008 -0400
+++ b/drivers/pci/probe.c Sat Sep 27 01:25:31 2008 -0400
@@ -884,6 +884,9 @@
 /* Fix up broken headers */
 pci_fixup_device(pci_fixup_header, dev);
+ /* Alternative Routing-ID Forwarding */
+ pci_ari_init(dev);
+
 /*
 * Add the device to our list of discovered devices
 * and the bus list for fixup functions, etc.
diff -r 5020cef2bc39 -r 040046b91eb7 include/linux/pci.h
--- a/include/linux/pci.h Sat Sep 27 01:25:05 2008 -0400
+++ b/include/linux/pci.h Sat Sep 27 01:25:31 2008 -0400
@@ -193,6 +193,7 @@
 unsigned int broken_parity_status:1; /* Device generates false 
positive parity */
 unsigned int msi_enabled:1;
 unsigned int msix_enabled:1;
+ unsigned int ari_enabled:1; /* ARI forwarding */
 u32 saved_config_space[16]; /* config space saved at 
suspend time */
 struct hlist_head saved_cap_space;
diff -r 5020cef2bc39 -r 040046b91eb7 include/linux/pci_regs.h
--- a/include/linux/pci_regs.h Sat Sep 27 01:25:05 2008 -0400
+++ b/include/linux/pci_regs.h Sat Sep 27 01:25:31 2008 -0400
@@ -378,6 +378,10 @@
 #define PCI_EXP_RTCTL_CRSSVE 0x10 /* CRS Software Visibility Enable */
 #define PCI_EXP_RTCAP 30 /* Root Capabilities */
 #define PCI_EXP_RTSTA 32 /* Root Status */
+#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
+#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
+#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
+#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
 /* Extended Capabilities (PCI-X 2.0 and Express) */
 #define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
@@ -388,6 +392,7 @@
 #define PCI_EXT_CAP_ID_VC 2
 #define PCI_EXT_CAP_ID_DSN 3
 #define PCI_EXT_CAP_ID_PWR 4
+#define PCI_EXT_CAP_ID_ARI 14
 /* Advanced Error Reporting */
 #define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */
@@ -463,4 +468,14 @@
 #define PCI_PWR_CAP 12 /* Capability */
 #define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */
+/* Alternative Routing-ID Interpretation */
+#define PCI_ARI_CAP 0x04 /* ARI Capability Register */
+#define PCI_ARI_CAP_MFVC 0x0001 /* MFVC Function Groups Capability */
+#define PCI_ARI_CAP_ACS 0x0002 /* ACS Function Groups Capability */
+#define PCI_ARI_CAP_NFN(x) (((x) >> 8) & 0xff) /* Next Function Number */
+#define PCI_ARI_CTRL 0x06 /* ARI Control Register */
+#define PCI_ARI_CTRL_MFVC 0x0001 /* MFVC Function Groups Enable */
+#define PCI_ARI_CTRL_ACS 0x0002 /* ACS Function Groups Enable */
+#define PCI_ARI_CTRL_FG(x) (((x) >> 4) & 7) /* Function Group */
+
 #endif /* LINUX_PCI_REGS_H */
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