Patch to fix horribly slow screen clear during Vista 32 installation
on AMD.
Can you explain what the patch does? It seems to extend the need for
extra update_cr3() calls to the 64bit hypervisor case and then cause it
never to happen at all.
diff -r 64544443e6d6 xen/arch/x86/mm/shadow/common.c
--- a/xen/arch/x86/mm/shadow/common.c Wed Oct 10 11:10:36 2007 -0400
+++ b/xen/arch/x86/mm/shadow/common.c Wed Oct 10 12:50:46 2007 -0400
@@ -36,6 +36,7 @@
#include <asm/current.h>
#include <asm/flushtlb.h>
#include <asm/shadow.h>
+#include <asm/paging.h>
Inside shadow code, it's best to use the shadow_* versions of things.
The paging_* ones will just check for being in shadow mode, which we
know is true.
#include "private.h"
@@ -2725,17 +2726,18 @@ shadow_write_p2m_entry(struct vcpu *v, u
safe_write_pte(p, new);
/* install P2M in monitors for PAE Xen */
-#if CONFIG_PAGING_LEVELS == 3
+#if CONFIG_PAGING_LEVELS >= 3
if ( level == 3 ) {
struct vcpu *v;
+#if CONFIG_PAGING_LEVELS == 3
/* We have written to the p2m l3: need to sync the per-vcpu
* copies of it in the monitor tables */
p2m_install_entry_in_monitors(d, (l3_pgentry_t *)p);
+#endif
/* Also, any vcpus running on shadows of the p2m need to
* reload their CR3s so the change propagates to the shadow */
for_each_vcpu(d, v) {
- if ( pagetable_get_pfn(v->arch.guest_table)
- == pagetable_get_pfn(d->arch.phys_table)
+ if ( likely(!paging_mode_translate(d))
This test will never be true; if you aren't in paging_mode_translate()
you won't be writing p2m entries in the first place.
That said, I think it's probably right to just get rid of the call
entirely, since we don't shadow the p2m any more.
Cheers,
Tim.