Make sure the upper 32 bits of RAX are disregarded during MSR write
emulation.
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>
Index: 2007年08月08日/xen/arch/x86/traps.c
===================================================================
--- 2007年08月08日.orig/xen/arch/x86/traps.c 2007年08月08日 11:37:08.000000000 
+0200
+++ 2007年08月08日/xen/arch/x86/traps.c 2007年08月08日 11:40:02.000000000 +0200
@@ -1696,6 +1696,8 @@ static int emulate_privileged_op(struct 
 break;
 
 case 0x30: /* WRMSR */
+ data = regs->eax;
+ res = ((u64)regs->edx << 32) | data;
 switch ( regs->ecx )
 {
 #ifdef CONFIG_X86_64
@@ -1704,24 +1706,21 @@ static int emulate_privileged_op(struct 
 goto fail;
 if ( wrmsr_safe(MSR_FS_BASE, regs->eax, regs->edx) )
 goto fail;
- v->arch.guest_context.fs_base =
- ((u64)regs->edx << 32) | regs->eax;
+ v->arch.guest_context.fs_base = res;
 break;
 case MSR_GS_BASE:
 if ( is_pv_32on64_vcpu(v) )
 goto fail;
 if ( wrmsr_safe(MSR_GS_BASE, regs->eax, regs->edx) )
 goto fail;
- v->arch.guest_context.gs_base_kernel =
- ((u64)regs->edx << 32) | regs->eax;
+ v->arch.guest_context.gs_base_kernel = res;
 break;
 case MSR_SHADOW_GS_BASE:
 if ( is_pv_32on64_vcpu(v) )
 goto fail;
 if ( wrmsr_safe(MSR_SHADOW_GS_BASE, regs->eax, regs->edx) )
 goto fail;
- v->arch.guest_context.gs_base_user =
- ((u64)regs->edx << 32) | regs->eax;
+ v->arch.guest_context.gs_base_user = res;
 break;
 #endif
 default:
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