Hi Tim
If on VM entry TLB is flushed why we are handling instruction "invlpg" in xen
can't this be done by doing VMexit and VM entry as this would do flushing of 
TLB?
Is this TLB flush done due to loading of guest state (mov to cr3)?
or 
Is TLB flush on VM entry hardware feature or is implemented in Xen ?
jeet
----- Original Message ----
From: Tim Deegan <Tim.Deegan@xxxxxxxxxxxxx>
To: aditya shevalkar <aditya27783@xxxxxxxxxxx>
Cc: xen-devel@xxxxxxxxxxxxxxxxxxx
Sent: Tuesday, 27 March, 2007 2:02:25 PM
Subject: Re: [Xen-devel] Question on shadow_invlpg return value handling.
At 10:21 +0530 on 27 Mar (1174990916), aditya shevalkar wrote:
> Can anyone explain me where does this return values from sh_invlpg are used.
> The comment is given below:
> /* Called when the guest requests an invlpg. Returns 1 if the invlpg
> * instruction should be issued on the hardware, or 0 if it's safe not
> * to do so. */
> I have followed the following path of function call in my study of the 
> function.
> vmx_vmexit_do_invlpg(va) à shadow_invlpg(v, va) à sh_invlpg(struct vcpu *v, 
> unsigned long va).
The VMX (and SVM) code ignores the return code of shadow_invlpg at the
moment, because they both flush the entire TLB on every VM entry anyway
(AMD's hardware support for tagged TLBs is apparently not quite useable
yet).
arch/x86/mm.c, which handles PV guests, uses the return code correctly,
e.g.:
 case MMUEXT_INVLPG_LOCAL:
 if ( !shadow_mode_enabled(d) 
 || shadow_invlpg(v, op.arg1.linear_addr) != 0 )
 local_flush_tlb_one(op.arg1.linear_addr);
 break;
Cheers,
Tim.
-- 
Tim Deegan <Tim.Deegan@xxxxxxxxxxxxx>, XenSource UK Limited
Registered office c/o EC2Y 5EB, UK; company number 05334508
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