> > To make it clearer, this hardware PT walker on IA64 is not 
> like normal
> > multi-level PT walker on x86. Instead it can be a virtually 
> linear table,
> > or a hash table which is configurable. ;-)
>
> Am I right in thinking it's also possible to implement 
> "software filled TLB" 
> on IA64? (as a fallback for when the hardware assist fails?). 
Not only possible, but normal. If there is a TLB miss and
a VHPT (virtual hashed page table) miss, software fills
both the TLB and VHPT.
Is that what you meant?
Dan
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