On Thu, Jul 28, 2005 at 10:35:06PM +0100, Ian Pratt wrote:
>
> > > http://www.cl.cam.ac.uk/~iap10/temp/xen-summit-2005-07.ppt 
> > 
> > The slides show >4g in green, and i'm pretty sure that's not quite the
>
> > case until we get bounce buffers or iommu working.
>
> Keir checked some bounce buffer support in a while back
> (dma_map_single). It's largely untested, though.
I must have missed this. Unless there is something i'm needing to
enable, the problem i've been working on with dma being attempted to
high addresses still stands.
> * Intel would get the standard s/w iommu working (just a case of
> ensuring we have a machine contiguous aperture beloe 4GB -- the Linux
> code currently uses the boot mem allocator rather than using
> alloc_coherent, so it will need a little tweaking)
Yeah, i haven't had much luck so far.
> * AMD would test gart support. Should just work...
>
> Since the vast majority of server platforms have hardware that is >4GB
> DMA capable, it might not actually be such a big deal in practice. The
> biggest pain is probably dumb SATA controllers. We definitely need more
> test coverage.
Right, i'm using a sata drive, it must be dumb.
sRp
-- 
Scott Parish
Signed-off-by: srparish@xxxxxxxxxx
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