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RE: [Xen-devel] RE: A question about PIT platform timer

To: "Keir Fraser" <keir@xxxxxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxx>
Subject: RE: [Xen-devel] RE: A question about PIT platform timer
From: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
Date: 2006年12月11日 23:22:57 +0800
Delivery-date: 2006年12月11日 07:23:13 -0800
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Thread-topic: [Xen-devel] RE: A question about PIT platform timer
>From: Keir Fraser [mailto:keir@xxxxxxxxxxxxx]
>Sent: 2006年12月11日 22:59
>On 11/12/06 14:35, "Keir Fraser" <keir@xxxxxxxxxxxxx> wrote:
>
>> On 11/12/06 12:10, "Tian, Kevin" <kevin.tian@xxxxxxxxx> wrote:
>>
>>> Yes, there's no interrupt from it. But what's the known frequency?
>>> CALIBRATE_LATCH or CLOCK_TICK_RATE? platform_timer_scale
>>> is set to the later, and so ch2 needs to work on same frequency or
>>> else count value will result incorrect offset. However I didn't see such
>>> setting on ch2. Does I miss something? :-)
>>
>> All the PIT channels tick at CLOCK_TICK_RATE. Mode-0 is not
>auto-relatching,
>> so when the counter reaches 0000 it carries on FFFF, FFFE, FFFD, ....
>>
>> So we calculate platform system time as:
>> system_timestamp + (pit_timestamp - pit_timenow) *
>(delta_system/delta_pit)
>
>Where, to be explicit, since system time is in nanoseconds we have:
> delta_system = 1000000000
> delta_pit = CLOCK_TICK_RATE
>
> -- Keir
You're exactly right. I happened to have illusion that counter represents 
the output frequency. What a misunderstanding! :-( Thanks for your 
explanation.
- Kevin
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