PAGE addr
Description:
Transfer addr .11:addr .9 into PA2 : PA0 , will delay skipping
Operation:
page = addr >> 9
Registers affected:
-
Sources referenced:
-
Cycles:
1
Opcode:
Notes:
PAGE n - The three literal bits of "n" are loaded into the page-select bits
PA2:PA0 in the STATUS register. This normally prepares a GOTO or CALL across
a page boundary. PA2 is currently unused since 2K of instruction memory is
only four pages.
Skipping a page instruction will also cause the instruction following the
page instruction to be skipped. This is designed to handle long
calls which must be coded as a page then a
call. See Skip for more details.
See:
file: /Techref/scenix/inst/page.htm,
2KB, , updated: 2007年9月24日 14:26, local time: 2025年9月2日 16:30,
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Questions?<A HREF="http://massmind.org/techref/scenix/inst/page.htm"> SX Embedded Controller Instruction - PAGE addr</A>
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