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Re: PCI expansion card working?
Hi! Tim,
From: Tim Rightnour <root%garbled.net@localhost>
Date: 2008年1月21日 20:41:08 -0700 (MST)
> Some bridge cards get *really* pissed when you probe past device 8 on them.
> In
> this case yours starts returning made up values. There is code in prep to
> deal
> with this on certain known cards, I think we need to add your card to that
> list.
>
> look at prep/pci/pci_machdep.c:prep_pci_bus_maxdevs(). see how it looks for
> prep-pcibus-maxdevices? Now look at the bottom of that file, you will see
> where we set that for some crazy dec card. Do the same for yours.
I added it as follows. And, it enabled the start with the vga console.
# Because CVS became a connection timeout, I was not able to obtain diff.
prep/pci/pci_machdep.c::prep_pci_conf_hook() ---
/* now look for bus quirks */
if ((PCI_VENDOR(id) == PCI_VENDOR_DEC &&
PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21154) ||
(PCI_VENDOR(id) == PCI_VENDOR_HINT &&
PCI_PRODUCT(id) == PCI_PRODUCT_HINT_HB1)) {
bmax = prop_number_create_integer(8);
KASSERT(bmax != NULL);
--- prep/pci/pci_machdep.c::prep_pci_conf_hook()
However, I saw a stranger message. This correction disabled MEM/IO of
ppb.
ppb0 at pci0 dev 22 function 0: PCI configuration registers:
Common header:
0x00: 0x00213388 0x02900144 0x06040013 0x0001ff08
Vendor Name: HiNT (0x3388)
Device Name: HB1 PCI-PCI Bridge (0x0021)
Command register: 0x0144
I/O space accesses: off <-- off ?
Memory space accesses: off <-- off ?
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: on
Address/data stepping: off
System error (SERR): on
Fast back-to-back transactions: off
Interrupt disable: off
... snip ...
HiNT HB1 PCI-PCI Bridge (PCI bridge, revision 0x13) at ? dev 22 function 0 (intr
swiz 0, intrpin 0, i/o off, mem off, no quirks): HiNT HB1 PCI-PCI Bridge (rev.
0x13)
pci1 at ppb0 bus 1
pci1: no spaces enabled! <--- Oops...
However, I saw IO/MEM of ppb enable in yesterday's log.
yesterday's log ---
ppb0 at pci0 dev 22 function 0: PCI configuration registers:
Common header:
0x00: 0x00213388 0x02900147 0x06040013 0x0001ff08
Vendor Name: HiNT (0x3388)
Device Name: HB1 PCI-PCI Bridge (0x0021)
Command register: 0x0147
I/O space accesses: on
Memory space accesses: on
--- yesterday's log
Should I compulsorily make MEM/IO of this ppb enable?
Thanks,
--
kiyohara
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