A device or system frequently employs many power and sleep states during its normal operation (e.g., normal power, additional power, low power, hibernate, deep sleep, etc.). A device also may be operating within a debug condition. State transitions can happen from one power or debug state to another. If there is information available in the previous state which should not be available in the next state and is not properly removed before the transition into the next state, sensitive information may leak from the system.
| Impact | Details |
|---|---|
|
Read Memory; Read Application Data |
Scope: Confidentiality, Integrity, Availability, Access Control, Accountability, Authentication, Authorization, Non-Repudiation
Likelihood: High
Sensitive information may be used to unlock additional capabilities of the device and take advantage of hidden functionalities which could be used to compromise device security.
|
| Phase(s) | Mitigation |
|---|---|
|
Architecture and Design; Implementation |
During state transitions, information not needed in the next state should be removed before the transition to the next state.
|
| Nature | Type | ID | Name |
|---|---|---|---|
| ChildOf | Base Base - a weakness that is still mostly independent of a resource or technology, but with sufficient details to provide specific methods for detection and prevention. Base level weaknesses typically describe issues in terms of 2 or 3 of the following dimensions: behavior, property, technology, language, and resource. | 226 | Sensitive Information in Resource Not Removed Before Reuse |
| CanPrecede | Class Class - a weakness that is described in a very abstract fashion, typically independent of any specific language or technology. More specific than a Pillar Weakness, but more general than a Base Weakness. Class level weaknesses typically describe issues in terms of 1 or 2 of the following dimensions: behavior, property, and resource. | 200 | Exposure of Sensitive Information to an Unauthorized Actor |
| Nature | Type | ID | Name |
|---|---|---|---|
| MemberOf | Category Category - a CWE entry that contains a set of other entries that share a common characteristic. | 1207 | Debug and Test Problems |
| Phase | Note |
|---|---|
| Architecture and Design |
VHDL (Undetermined Prevalence)
Verilog (Undetermined Prevalence)
Class: Hardware Description Language (Undetermined Prevalence)
Class: Not OS-Specific (Undetermined Prevalence)
Class: Not Architecture-Specific (Undetermined Prevalence)
Class: Not Technology-Specific (Undetermined Prevalence)
Example 1
This example shows how an attacker can take advantage of an incorrect state transition.
Suppose a device is transitioning from state A to state B. During state A, it can read certain private keys from the hidden fuses that are only accessible in state A but not in state B. The device reads the keys, performs operations using those keys, then transitions to state B, where those private keys should no longer be accessible.
During the transition from A to B, the device does not scrub the memory.
After the transition to state B, even though the private keys are no longer accessible directly from the fuses in state B, they can be accessed indirectly by reading the memory that contains the private keys.
Note: this is a curated list of examples for users to understand the variety of ways in which this weakness can be introduced. It is not a complete list of all CVEs that are related to this CWE entry.
| Reference | Description |
|---|---|
|
Product software does not set a flag as per TPM specifications, thereby preventing a failed authorization attempt from being recorded after a loss of power.
|
| Ordinality | Description |
|---|---|
|
Primary
|
(where the weakness exists independent of other weaknesses)
|
| Method | Details |
|---|---|
|
Manual Analysis |
Write a known pattern into each sensitive location. Enter the power/debug state in question. Read data back from the sensitive locations. If the reads are successful, and the data is the same as the pattern that was originally written, the test fails and the device needs to be fixed. Note that this test can likely be automated.
Effectiveness: High |
| Nature | Type | ID | Name |
|---|---|---|---|
| MemberOf | ViewView - a subset of CWE entries that provides a way of examining CWE content. The two main view structures are Slices (flat lists) and Graphs (containing relationships between entries). | 1343 | Weaknesses in the 2021 CWE Most Important Hardware Weaknesses List |
| MemberOf | CategoryCategory - a CWE entry that contains a set of other entries that share a common characteristic. | 1416 | Comprehensive Categorization: Resource Lifecycle Management |
| MemberOf | CategoryCategory - a CWE entry that contains a set of other entries that share a common characteristic. | 1433 | 2025 MIHW Supplement: Expert Insights |
Rationale
This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.Comments
Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.| Submissions | |||
|---|---|---|---|
| Submission Date | Submitter | Organization | |
|
2020年05月31日
(CWE 4.1, 2020年02月24日) |
Parbati Kumar Manna, Hareesh Khattri, Arun Kanuparthi | Intel Corporation | |
| Modifications | |||
| Modification Date | Modifier | Organization | |
|
2025年09月09日
(CWE 4.18, 2025年09月09日) |
CWE Content Team | MITRE | |
| updated References, Relationships | |||
|
2025年04月03日
(CWE 4.17, 2025年04月03日) |
CWE Content Team | MITRE | |
| updated Demonstrative_Examples | |||
| 2023年06月29日 | CWE Content Team | MITRE | |
| updated Mapping_Notes | |||
| 2023年04月27日 | CWE Content Team | MITRE | |
| updated Relationships | |||
| 2022年10月13日 | CWE Content Team | MITRE | |
| updated Applicable_Platforms | |||
| 2021年10月28日 | CWE Content Team | MITRE | |
| updated Common_Consequences, Demonstrative_Examples, Description, Detection_Factors, Observed_Examples, Potential_Mitigations, References, Relationships, Weakness_Ordinalities | |||
| 2021年03月15日 | CWE Content Team | MITRE | |
| updated Functional_Areas | |||
| 2020年08月20日 | CWE Content Team | MITRE | |
| updated Applicable_Platforms, Common_Consequences, Demonstrative_Examples, Description, Name, Potential_Mitigations, Related_Attack_Patterns, Relationships | |||
| Previous Entry Names | |||
| Change Date | Previous Entry Name | ||
| 2020年08月20日 | Debug/Power State Transitions Leak Information | ||
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