1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2015 Nahanni Systems, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31#include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34#include <sys/types.h> 35#include <sys/mman.h> 36 37#include <machine/vmm.h> 38#include <machine/vmm_snapshot.h> 39#include <vmmapi.h> 40 41#include <stdio.h> 42#include <stdlib.h> 43#include <string.h> 44 45#include <errno.h> 46#include <unistd.h> 47 48#include "bhyvegc.h" 49#include "bhyverun.h" 50#include "debug.h" 51#include "console.h" 52#include "inout.h" 53#include "pci_emul.h" 54#include "rfb.h" 55#include "vga.h" 56 57 /* 58 * bhyve Framebuffer device emulation. 59 * BAR0 points to the current mode information. 60 * BAR1 is the 32-bit framebuffer address. 61 * 62 * -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height 63 */ 64 65 static int fbuf_debug = 1; 66#define DEBUG_INFO 1 67#define DEBUG_VERBOSE 4 68#define DPRINTF(level, params) if (level <= fbuf_debug) PRINTLN params 69 70 71#define KB (1024UL) 72#define MB (1024 * 1024UL) 73 74#define DMEMSZ 128 75 76#define FB_SIZE (16*MB) 77 78#define COLS_MAX 1920 79#define ROWS_MAX 1200 80 81#define COLS_DEFAULT 1024 82#define ROWS_DEFAULT 768 83 84#define COLS_MIN 640 85#define ROWS_MIN 480 86 87 struct pci_fbuf_softc { 88 struct pci_devinst *fsc_pi; 89 struct { 90 uint32_t fbsize; 91 uint16_t width; 92 uint16_t height; 93 uint16_t depth; 94 uint16_t refreshrate; 95 uint8_t reserved[116]; 96 } __packed memregs; 97 98 /* rfb server */ 99 char *rfb_host; 100 char *rfb_password; 101 int rfb_port; 102 int rfb_wait; 103 int vga_enabled; 104 int vga_full; 105 106 uint32_t fbaddr; 107 char *fb_base; 108 uint16_t gc_width; 109 uint16_t gc_height; 110 void *vgasc; 111 struct bhyvegc_image *gc_image; 112}; 113 114 static struct pci_fbuf_softc *fbuf_sc; 115 116#define PCI_FBUF_MSI_MSGS 4 117 118 static void 119 pci_fbuf_usage(char *opt) 120{ 121 122 EPRINTLN("Invalid fbuf emulation option \"%s\"", opt); 123 EPRINTLN("fbuf: {wait,}{vga=on|io|off,}rfb=<ip>:port" 124 "{,w=width}{,h=height}"); 125} 126 127 static void 128 pci_fbuf_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 129 int baridx, uint64_t offset, int size, uint64_t value) 130{ 131 struct pci_fbuf_softc *sc; 132 uint8_t *p; 133 134 assert(baridx == 0); 135 136 sc = pi->pi_arg; 137 138 DPRINTF(DEBUG_VERBOSE, 139 ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx", 140 offset, size, value)); 141 142 if (offset + size > DMEMSZ) { 143 printf("fbuf: write too large, offset %ld size %d\n", 144 offset, size); 145 return; 146 } 147 148 p = (uint8_t *)&sc->memregs + offset; 149 150 switch (size) { 151 case 1: 152 *p = value; 153 break; 154 case 2: 155 *(uint16_t *)p = value; 156 break; 157 case 4: 158 *(uint32_t *)p = value; 159 break; 160 case 8: 161 *(uint64_t *)p = value; 162 break; 163 default: 164 printf("fbuf: write unknown size %d\n", size); 165 break; 166 } 167 168 if (!sc->gc_image->vgamode && sc->memregs.width == 0 && 169 sc->memregs.height == 0) { 170 DPRINTF(DEBUG_INFO, ("switching to VGA mode")); 171 sc->gc_image->vgamode = 1; 172 sc->gc_width = 0; 173 sc->gc_height = 0; 174 } else if (sc->gc_image->vgamode && sc->memregs.width != 0 && 175 sc->memregs.height != 0) { 176 DPRINTF(DEBUG_INFO, ("switching to VESA mode")); 177 sc->gc_image->vgamode = 0; 178 } 179} 180 181 uint64_t 182 pci_fbuf_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, 183 int baridx, uint64_t offset, int size) 184{ 185 struct pci_fbuf_softc *sc; 186 uint8_t *p; 187 uint64_t value; 188 189 assert(baridx == 0); 190 191 sc = pi->pi_arg; 192 193 194 if (offset + size > DMEMSZ) { 195 printf("fbuf: read too large, offset %ld size %d\n", 196 offset, size); 197 return (0); 198 } 199 200 p = (uint8_t *)&sc->memregs + offset; 201 value = 0; 202 switch (size) { 203 case 1: 204 value = *p; 205 break; 206 case 2: 207 value = *(uint16_t *)p; 208 break; 209 case 4: 210 value = *(uint32_t *)p; 211 break; 212 case 8: 213 value = *(uint64_t *)p; 214 break; 215 default: 216 printf("fbuf: read unknown size %d\n", size); 217 break; 218 } 219 220 DPRINTF(DEBUG_VERBOSE, 221 ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx", 222 offset, size, value)); 223 224 return (value); 225} 226 227 static int 228 pci_fbuf_parse_opts(struct pci_fbuf_softc *sc, char *opts) 229{ 230 char *uopts, *uoptsbak, *xopts, *config; 231 char *tmpstr; 232 int ret; 233 234 ret = 0; 235 uoptsbak = uopts = strdup(opts); 236 while ((xopts = strsep(&uopts, ",")) != NULL) { 237 if (strcmp(xopts, "wait") == 0) { 238 sc->rfb_wait = 1; 239 continue; 240 } 241 242 if ((config = strchr(xopts, '=')) == NULL) { 243 pci_fbuf_usage(xopts); 244 ret = -1; 245 goto done; 246 } 247 248 *config++ = '0円'; 249 250 DPRINTF(DEBUG_VERBOSE, ("pci_fbuf option %s = %s", 251 xopts, config)); 252 253 if (!strcmp(xopts, "tcp") || !strcmp(xopts, "rfb")) { 254 /* 255 * IPv4 -- host-ip:port 256 * IPv6 -- [host-ip%zone]:port 257 * XXX for now port is mandatory. 258 */ 259 tmpstr = strsep(&config, "]"); 260 if (config) { 261 if (tmpstr[0] == '[') 262 tmpstr++; 263 sc->rfb_host = strdup(tmpstr); 264 if (config[0] == ':') 265 config++; 266 else { 267 pci_fbuf_usage(xopts); 268 ret = -1; 269 goto done; 270 } 271 sc->rfb_port = atoi(config); 272 } else { 273 config = tmpstr; 274 tmpstr = strsep(&config, ":"); 275 if (!config) 276 sc->rfb_port = atoi(tmpstr); 277 else { 278 sc->rfb_port = atoi(config); 279 sc->rfb_host = strdup(tmpstr); 280 } 281 } 282 } else if (!strcmp(xopts, "vga")) { 283 if (!strcmp(config, "off")) { 284 sc->vga_enabled = 0; 285 } else if (!strcmp(config, "io")) { 286 sc->vga_enabled = 1; 287 sc->vga_full = 0; 288 } else if (!strcmp(config, "on")) { 289 sc->vga_enabled = 1; 290 sc->vga_full = 1; 291 } else { 292 pci_fbuf_usage(xopts); 293 ret = -1; 294 goto done; 295 } 296 } else if (!strcmp(xopts, "w")) { 297 sc->memregs.width = atoi(config); 298 if (sc->memregs.width > COLS_MAX) { 299 pci_fbuf_usage(xopts); 300 ret = -1; 301 goto done; 302 } else if (sc->memregs.width == 0) 303 sc->memregs.width = 1920; 304 } else if (!strcmp(xopts, "h")) { 305 sc->memregs.height = atoi(config); 306 if (sc->memregs.height > ROWS_MAX) { 307 pci_fbuf_usage(xopts); 308 ret = -1; 309 goto done; 310 } else if (sc->memregs.height == 0) 311 sc->memregs.height = 1080; 312 } else if (!strcmp(xopts, "password")) { 313 sc->rfb_password = strdup(config); 314 } else { 315 pci_fbuf_usage(xopts); 316 ret = -1; 317 goto done; 318 } 319 } 320 321 done: 322 free(uoptsbak); 323 return (ret); 324} 325 326 327 extern void vga_render(struct bhyvegc *gc, void *arg); 328 329 void 330 pci_fbuf_render(struct bhyvegc *gc, void *arg) 331{ 332 struct pci_fbuf_softc *sc; 333 334 sc = arg; 335 336 if (sc->vga_full && sc->gc_image->vgamode) { 337 /* TODO: mode switching to vga and vesa should use the special 338 * EFI-bhyve protocol port. 339 */ 340 vga_render(gc, sc->vgasc); 341 return; 342 } 343 if (sc->gc_width != sc->memregs.width || 344 sc->gc_height != sc->memregs.height) { 345 bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height); 346 sc->gc_width = sc->memregs.width; 347 sc->gc_height = sc->memregs.height; 348 } 349 350 return; 351} 352 353 static int 354 pci_fbuf_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) 355{ 356 int error, prot; 357 struct pci_fbuf_softc *sc; 358 359 if (fbuf_sc != NULL) { 360 EPRINTLN("Only one frame buffer device is allowed."); 361 return (-1); 362 } 363 364 sc = calloc(1, sizeof(struct pci_fbuf_softc)); 365 366 pi->pi_arg = sc; 367 368 /* initialize config space */ 369 pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB); 370 pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D); 371 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY); 372 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA); 373 374 error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ); 375 assert(error == 0); 376 377 error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE); 378 assert(error == 0); 379 380 error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS); 381 assert(error == 0); 382 383 sc->fbaddr = pi->pi_bar[1].addr; 384 sc->memregs.fbsize = FB_SIZE; 385 sc->memregs.width = COLS_DEFAULT; 386 sc->memregs.height = ROWS_DEFAULT; 387 sc->memregs.depth = 32; 388 389 sc->vga_enabled = 1; 390 sc->vga_full = 0; 391 392 sc->fsc_pi = pi; 393 394 error = pci_fbuf_parse_opts(sc, opts); 395 if (error != 0) 396 goto done; 397 398 /* XXX until VGA rendering is enabled */ 399 if (sc->vga_full != 0) { 400 EPRINTLN("pci_fbuf: VGA rendering not enabled"); 401 goto done; 402 } 403 404 sc->fb_base = vm_create_devmem(ctx, VM_FRAMEBUFFER, "framebuffer", FB_SIZE); 405 if (sc->fb_base == MAP_FAILED) { 406 error = -1; 407 goto done; 408 } 409 DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]", 410 sc->fb_base, FB_SIZE)); 411 412 /* 413 * Map the framebuffer into the guest address space. 414 * XXX This may fail if the BAR is different than a prior 415 * run. In this case flag the error. This will be fixed 416 * when a change_memseg api is available. 417 */ 418 prot = PROT_READ | PROT_WRITE; 419 if (vm_mmap_memseg(ctx, sc->fbaddr, VM_FRAMEBUFFER, 0, FB_SIZE, prot) != 0) { 420 EPRINTLN("pci_fbuf: mapseg failed - try deleting VM and restarting"); 421 error = -1; 422 goto done; 423 } 424 425 console_init(sc->memregs.width, sc->memregs.height, sc->fb_base); 426 console_fb_register(pci_fbuf_render, sc); 427 428 if (sc->vga_enabled) 429 sc->vgasc = vga_init(!sc->vga_full); 430 sc->gc_image = console_get_image(); 431 432 fbuf_sc = sc; 433 434 memset((void *)sc->fb_base, 0, FB_SIZE); 435 436 error = rfb_init(sc->rfb_host, sc->rfb_port, sc->rfb_wait, sc->rfb_password); 437 done: 438 if (error) 439 free(sc); 440 441 return (error); 442} 443 444#ifdef BHYVE_SNAPSHOT 445 static int 446 pci_fbuf_snapshot(struct vm_snapshot_meta *meta) 447{ 448 int ret; 449 450 SNAPSHOT_BUF_OR_LEAVE(fbuf_sc->fb_base, FB_SIZE, meta, ret, err); 451 452 err: 453 return (ret); 454} 455#endif 456 457 struct pci_devemu pci_fbuf = { 458 .pe_emu = "fbuf", 459 .pe_init = pci_fbuf_init, 460 .pe_barwrite = pci_fbuf_write, 461 .pe_barread = pci_fbuf_read, 462#ifdef BHYVE_SNAPSHOT 463 .pe_snapshot = pci_fbuf_snapshot, 464#endif 465}; 466 PCI_EMUL_SET(pci_fbuf); 467